hymod.c

AT91RM9200的完整启动代码：包括loader, boot及U-boot三部分均已编译通过！欢迎下载使用！

	/* Read Burst (RBS) - offset 0x08 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Write Single Beat (WSS) - offset 0x18 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Write Burst (WSS) - offset 0x20 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Refresh Timer (PTS) - offset 0x30 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Exception Condition (EXS) - offset 0x3c */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
};

uint upmc_table[] = {
	/* Read Single Beat (RSS) - offset 0x00 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Read Burst (RBS) - offset 0x08 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Write Single Beat (WSS) - offset 0x18 */
	0xF0E00000, 0xF0A00000, 0x00A00000, 0x30A00000,
	0xF0F40007, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Write Burst (WSS) - offset 0x20 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Refresh Timer (PTS) - offset 0x30 */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
	/* Exception Condition (EXS) - offset 0x3c */
	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
};

int misc_init_f (void)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8260_t *memctl = &immap->im_memctl;

	printf ("UPMs:  ");

	upmconfig (UPMB, upmb_table, sizeof upmb_table / sizeof upmb_table[0]);
	memctl->memc_mbmr = CFG_MBMR;

	upmconfig (UPMC, upmc_table, sizeof upmc_table / sizeof upmc_table[0]);
	memctl->memc_mcmr = CFG_MCMR;

	printf ("configured\n");
	return (0);
}

/* ------------------------------------------------------------------------- */

long initdram (int board_type)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8260_t *memctl = &immap->im_memctl;
	volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8);
	ulong psdmr = CFG_PSDMR;
	int i;

	/*
	 * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
	 *
	 * "At system reset, initialization software must set up the
	 *  programmable parameters in the memory controller banks registers
	 *  (ORx, BRx, P/LSDMR). After all memory parameters are con辡ured,
	 *  system software should execute the following initialization sequence
	 *  for each SDRAM device.
	 *
	 *  1. Issue a PRECHARGE-ALL-BANKS command
	 *  2. Issue eight CBR REFRESH commands
	 *  3. Issue a MODE-SET command to initialize the mode register
	 *
	 *  The initial commands are executed by setting P/LSDMR[OP] and
	 *  accessing the SDRAM with a single-byte transaction."
	 *
	 * The appropriate BRx/ORx registers have already been set when we
	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
	 */

	memctl->memc_psrt = CFG_PSRT;
	memctl->memc_mptpr = CFG_MPTPR;

	memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
	*ramaddr = c;

	memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
	for (i = 0; i < 8; i++)
		*ramaddr = c;

	memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
	*ramaddr = c;

	memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
	*ramaddr = c;

	return (CFG_SDRAM_SIZE << 20);
}

/* ------------------------------------------------------------------------- */
/* miscellaneous initialisations after relocation into ram (misc_init_r)     */
/* 									     */
/* loads the data in the main board and mezzanine board eeproms into	     */
/* the hymod configuration struct stored in the board information area.	     */
/* 									     */
/* if the contents of either eeprom is invalid, prompts for a serial	     */
/* number (and an ethernet address if required) then fetches a file	     */
/* containing information to be stored in the eeprom from the tftp server    */
/* (the file name is based on the serial number and a built-in path)	     */

/* these are relative to the root of the server's tftp directory */
static char *bddb_cfgdir = "/hymod/bddb";
static char *global_env_path = "/hymod/global_env";

static ulong get_serno (const char *prompt)
{
	for (;;) {
		int n;
		char *p;
		ulong serno;

		n = readline (prompt);

		if (n < 0)
			return (0);

		if (n == 0)
			continue;

		serno = simple_strtol (console_buffer, &p, 10);

		if (p > console_buffer && *p == '\0')
			return (serno);

		printf ("Invalid number (%s) - please re-enter\n", console_buffer);
	}
}

static int read_eeprom (char *label, unsigned offset, hymod_eeprom_t * ep)
{
	char filename[50], prompt[50];
	ulong serno;
	int count = 0;

	sprintf (prompt, "Enter %s board serial number: ", label);

	for (;;) {

		if (eeprom_load (offset, ep))
			return (1);

		printf ("*** %s board EEPROM contents are %sinvalid\n",
				label, count == 0 ? "" : "STILL ");

		puts ("*** will attempt to fetch from server (Ctrl-C to abort)\n");

		if ((serno = get_serno (prompt)) == 0) {
			puts ("\n*** interrupted! - ignoring eeprom contents\n");
			return (0);
		}

		sprintf (filename, "%s/%010lu.cfg", bddb_cfgdir, serno);

		printf ("*** fetching %s board EEPROM contents from server\n",
				label);

		if (eeprom_fetch (offset, filename, 0x100000) == 0) {
			puts ("*** fetch failed - ignoring eeprom contents\n");
			return (0);
		}

		count++;
	}
}

static ulong main_serno;

static int env_fetch_callback (uchar * name, uchar * value)
{
	char *ov, nv[CFG_CBSIZE], *p, *q, *nn;
	int override = 1, append = 0, nl;

	nn = name;
	if (*nn == '-') {
		override = 0;
		nn++;
	}

	if ((nl = strlen (nn)) > 0 && nn[nl - 1] == '+') {
		append = 1;
		nn[--nl] = '\0';
	}

	p = value;
	q = nv;

	while ((*q = *p++) != '\0')
		if (*q == '%') {
			switch (*p++) {

			case '\0':			/* whoops - back up */
				p--;
				break;

			case '%':			/* a single percent character */
				q++;
				break;

			case 's':			/* main board serial number as string */
				q += sprintf (q, "%010lu", main_serno);
				break;

			case 'S':			/* main board serial number as number */
				q += sprintf (q, "%lu", main_serno);
				break;

			default:			/* ignore any others */
				break;
			}
		} else
			q++;

	if ((ov = getenv (nn)) != NULL) {

		if (append) {

			if (strstr (ov, nv) == NULL) {
				int ovl, nvl;

				printf ("Appending '%s' to env cmd '%s'\n", nv, nn);

				ovl = strlen (ov);
				nvl = strlen (nv);

				while (nvl >= 0) {
					nv[ovl + 1 + nvl] = nv[nvl];
					nvl--;
				}

				nv[ovl] = ' ';

				while (--ovl >= 0)
					nv[ovl] = ov[ovl];

				setenv (nn, nv);
			}

			return (1);
		}

		if (!override || strcmp (ov, nv) == 0)
			return (1);

		printf ("Re-setting env cmd '%s' from '%s' to '%s'\n", nn, ov, nv);
	} else
		printf ("Setting env cmd '%s' to '%s'\n", nn, nv);

	setenv (nn, nv);
	return (1);
}

int misc_init_r (void)
{
	DECLARE_GLOBAL_DATA_PTR;

	hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
	int rc;

	memset ((void *) cp, 0, sizeof (*cp));

	/* set up main board config info */

	if (i2c_probe (CFG_I2C_EEPROM_ADDR | HYMOD_EEOFF_MAIN)) {

		if (read_eeprom
			("main", HYMOD_EEOFF_MAIN << 8, &cp->main.eeprom))
			cp->main.eeprom_valid = 1;

		puts ("EEPROM:main...");

		if (cp->main.eeprom_valid) {
			printf ("OK (ver %u)\n", cp->main.eeprom.ver);
			eeprom_print (&cp->main.eeprom);
			main_serno = cp->main.eeprom.serno;
		} else
			puts ("BAD\n");

		cp->main.mmap[0].prog.exists = 1;
		cp->main.mmap[0].prog.size = FPGA_MAIN_CFG_SIZE;
		cp->main.mmap[0].prog.base = FPGA_MAIN_CFG_BASE;

		cp->main.mmap[0].reg.exists = 1;
		cp->main.mmap[0].reg.size = FPGA_MAIN_REG_SIZE;
		cp->main.mmap[0].reg.base = FPGA_MAIN_REG_BASE;

		cp->main.mmap[0].port.exists = 1;
		cp->main.mmap[0].port.size = FPGA_MAIN_PORT_SIZE;
		cp->main.mmap[0].port.base = FPGA_MAIN_PORT_BASE;

		cp->main.iopins[0].prog_pin.port = FPGA_MAIN_PROG_PORT;
		cp->main.iopins[0].prog_pin.pin = FPGA_MAIN_PROG_PIN;
		cp->main.iopins[0].prog_pin.flag = 1;
		cp->main.iopins[0].init_pin.port = FPGA_MAIN_INIT_PORT;
		cp->main.iopins[0].init_pin.pin = FPGA_MAIN_INIT_PIN;
		cp->main.iopins[0].init_pin.flag = 1;
		cp->main.iopins[0].done_pin.port = FPGA_MAIN_DONE_PORT;
		cp->main.iopins[0].done_pin.pin = FPGA_MAIN_DONE_PIN;
		cp->main.iopins[0].done_pin.flag = 1;
#ifdef FPGA_MAIN_ENABLE_PORT
		cp->main.iopins[0].enable_pin.port = FPGA_MAIN_ENABLE_PORT;
		cp->main.iopins[0].enable_pin.pin = FPGA_MAIN_ENABLE_PIN;
		cp->main.iopins[0].enable_pin.flag = 1;
#endif
	} else
		puts ("EEPROM:main...NOT PRESENT\n");

	/* set up mezzanine board config info */

	if (i2c_probe (CFG_I2C_EEPROM_ADDR | HYMOD_EEOFF_MEZZ)) {

		if (read_eeprom
			("mezz", HYMOD_EEOFF_MEZZ << 8, &cp->mezz.eeprom))
			cp->mezz.eeprom_valid = 1;

		puts ("EEPROM:mezz...");

		if (cp->mezz.eeprom_valid) {
			printf ("OK (ver %u)\n", cp->mezz.eeprom.ver);
			eeprom_print (&cp->mezz.eeprom);
		} else
			puts ("BAD\n");

		cp->mezz.mmap[0].prog.exists = 1;
		cp->mezz.mmap[0].prog.size = FPGA_MEZZ_CFG_SIZE;
		cp->mezz.mmap[0].prog.base = FPGA_MEZZ_CFG_BASE;

		cp->mezz.mmap[0].reg.exists = 0;

		cp->mezz.mmap[0].port.exists = 0;

		cp->mezz.iopins[0].prog_pin.port = FPGA_MEZZ_PROG_PORT;
		cp->mezz.iopins[0].prog_pin.pin = FPGA_MEZZ_PROG_PIN;
		cp->mezz.iopins[0].prog_pin.flag = 1;
		cp->mezz.iopins[0].init_pin.port = FPGA_MEZZ_INIT_PORT;
		cp->mezz.iopins[0].init_pin.pin = FPGA_MEZZ_INIT_PIN;
		cp->mezz.iopins[0].init_pin.flag = 1;
		cp->mezz.iopins[0].done_pin.port = FPGA_MEZZ_DONE_PORT;
		cp->mezz.iopins[0].done_pin.pin = FPGA_MEZZ_DONE_PIN;
		cp->mezz.iopins[0].done_pin.flag = 1;
#ifdef FPGA_MEZZ_ENABLE_PORT
		cp->mezz.iopins[0].enable_pin.port = FPGA_MEZZ_ENABLE_PORT;
		cp->mezz.iopins[0].enable_pin.pin = FPGA_MEZZ_ENABLE_PIN;
		cp->mezz.iopins[0].enable_pin.flag = 1;
#endif

		if (cp->mezz.eeprom_valid &&
			cp->mezz.eeprom.bdtype == HYMOD_BDTYPE_DISPLAY) {
			/*
			 * mezzanine board is a display board - switch the SEL_CD
			 * input of the FS6377 clock generator (via I/O Port Pin PA11) to
			 * high (or 1) to select the 27MHz required by the display board
			 */
			iopin_set_high (&pa11);

			puts ("SEL_CD:toggled for display board\n");
		}
	} else
		puts ("EEPROM:mezz...NOT PRESENT\n");

	cp->crc =
			crc32 (0, (unsigned char *) cp, offsetof (hymod_conf_t, crc));

	if (getenv ("global_env_loaded") == NULL) {

		puts ("*** global environment has not been loaded\n");
		puts ("*** fetching from server (Control-C to Abort)\n");

		rc = fetch_and_parse (global_env_path, 0x100000,
							  env_fetch_callback);

		if (rc == 0)
			puts ("*** Fetch of environment failed!\n");
		else
			setenv ("global_env_loaded", "yes");
	}
	return (0);
}