lwmon.h

AT91RM9200的完整启动代码：包括loader, boot及U-boot三部分均已编译通过！欢迎下载使用！

/*
 * (C) Copyright 2001
 * Wolfgang Denk, DENX Software Engineering, [e-mail].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* External logbuffer support */
#define CONFIG_LOGBUFFER

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_MPC823		1	/* This is a MPC823E CPU	*/
#define CONFIG_LWMON		1	/* ...on a LWMON board		*/

#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init		*/
#define CONFIG_BOARD_POSTCLK_INIT 1	/* Call board_postclk_init	*/

#define CONFIG_LCD		1	/* use LCD controller ...	*/
#define CONFIG_HLD1045		1	/* ... with a HLD1045 display	*/

#define	CONFIG_SPLASH_SCREEN		/* ... with splashscreen support*/

#if 1
#define CONFIG_8xx_CONS_SMC2	1	/* Console is on SMC2		*/
#else
#define CONFIG_8xx_CONS_SCC2
#endif

#define CONFIG_BAUDRATE		115200	/* with watchdog >= 38400 needed */

#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second	*/

#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */

/* pre-boot commands */
#define	CONFIG_PREBOOT		"setenv bootdelay 15"

#undef	CONFIG_BOOTARGS

/* POST support */
#define CONFIG_POST		(CFG_POST_CACHE	   | \
				 CFG_POST_WATCHDOG | \
				 CFG_POST_RTC	   | \
				 CFG_POST_MEMORY   | \
				 CFG_POST_CPU	   | \
				 CFG_POST_UART	   | \
				 CFG_POST_ETHER    | \
				 CFG_POST_I2C	   | \
				 CFG_POST_SPI	   | \
				 CFG_POST_USB	   | \
				 CFG_POST_SPR	   | \
				 CFG_POST_SYSMON)

#define CONFIG_BOOTCOMMAND	"run flash_self"

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"kernel_addr=40080000\0"					\
	"ramdisk_addr=40280000\0"					\
	"magic_keys=#3\0"						\
	"key_magic#=28\0"						\
	"key_cmd#=setenv addfb setenv 'bootargs $bootargs console=tty0'\0" \
	"key_magic3=3C+3F\0"						\
	"key_cmd3=echo *** Entering Test Mode ***;"			\
		"setenv add_misc 'setenv bootargs $bootargs testmode'\0" \
	"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath\0" \
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addfb=setenv bootargs $bootargs console=ttyS1,$baudrate\0"	\
	"addip=setenv bootargs $bootargs "				\
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
		"panic=1\0"						\
	"add_wdt=setenv bootargs $bootargs $wdt_args\0"			\
	"add_misc=setenv bootargs $bootargs runmode\0"			\
	"flash_nfs=run nfsargs addip add_wdt addfb add_misc;"		\
		"bootm $kernel_addr\0"					\
	"flash_self=run ramargs addip add_wdt addfb add_misc;"		\
		"bootm $kernel_addr $ramdisk_addr\0"			\
	"net_nfs=tftp 100000 /tftpboot/uImage.lwmon;"			\
		"run nfsargs addip add_wdt addfb;bootm\0"		\
	"rootpath=/opt/eldk/ppc_8xx\0"					\
	"load=tftp 100000 /tftpboot/u-boot.bin\0"			\
	"update=protect off 1:0;era 1:0;cp.b 100000 40000000 $filesize\0" \
	"wdt_args=wdt_8xx=off\0"					\
	"verify=no"

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/

#define	CONFIG_WATCHDOG		1	/* watchdog enabled		*/

#undef	CONFIG_STATUS_LED		/* Status LED disabled		*/

/* enable I2C and select the hardware/software driver */
#undef	CONFIG_HARD_I2C			/* I2C with hardware support	*/
#define	CONFIG_SOFT_I2C         1	/* I2C bit-banged		*/

#define CFG_I2C_SPEED		93000	/* 93 kHz is supposed to work	*/
#define CFG_I2C_SLAVE		0xFE

#ifdef CONFIG_SOFT_I2C
/*
 * Software (bit-bang) I2C driver configuration
 */
#define PB_SCL		0x00000020	/* PB 26 */
#define PB_SDA		0x00000010	/* PB 27 */

#define I2C_INIT	(immr->im_cpm.cp_pbdir |=  PB_SCL)
#define I2C_ACTIVE	(immr->im_cpm.cp_pbdir |=  PB_SDA)
#define I2C_TRISTATE	(immr->im_cpm.cp_pbdir &= ~PB_SDA)
#define I2C_READ	((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
#define I2C_SDA(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
			else    immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
			else    immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY	udelay(2)	/* 1/4 I2C clock duration */
#endif	/* CONFIG_SOFT_I2C */


#define CONFIG_RTC_PCF8563		/* use Philips PCF8563 RTC	*/

#ifdef CONFIG_POST
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
#else
#define CFG_CMD_POST_DIAG 0
#endif

#ifdef CONFIG_8xx_CONS_SCC2	/* Can't use ethernet, then */
#define CONFIG_COMMANDS	     ( (CONFIG_CMD_DFL & ~CFG_CMD_NET) | \
				CFG_CMD_DATE	| \
				CFG_CMD_I2C	| \
				CFG_CMD_EEPROM	| \
				CFG_CMD_IDE	| \
				CFG_CMD_BSP	| \
				CFG_CMD_BMP	| \
				CFG_CMD_POST_DIAG )
#else
#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
				CFG_CMD_DHCP	| \
				CFG_CMD_DATE	| \
				CFG_CMD_I2C	| \
				CFG_CMD_EEPROM	| \
				CFG_CMD_IDE	| \
				CFG_CMD_BSP	| \
				CFG_CMD_BMP	| \
				CFG_CMD_POST_DIAG )
#endif
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION

#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

/*----------------------------------------------------------------------*/

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP			/* undef to save memory		*/
#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/

#define	CFG_HUSH_PARSER		1	/* use "hush" command parser	*/
#endif
#ifdef	CFG_HUSH_PARSER
#define	CFG_PROMPT_HUSH_PS2	"> "

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x00100000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x00F00000	/* 1 ... 15MB in DRAM	*/

#define CFG_LOAD_ADDR		0x00100000	/* default load address */

#define CFG_PIO_MODE		0	/* IDE interface in PIO Mode 0	*/

#define CFG_HZ			1000	/* decrementer freq: 1 ms ticks */

/*
 * When the watchdog is enabled, output must be fast enough in Linux.
 */
#ifdef CONFIG_WATCHDOG
#define CFG_BAUDRATE_TABLE	{		38400, 57600, 115200 }
#else
#define CFG_BAUDRATE_TABLE	{  9600, 19200, 38400, 57600, 115200 }
#endif

/*
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */
/*-----------------------------------------------------------------------
 * Internal Memory Mapped Register
 */
#define CFG_IMMR		0xFFF00000

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */
#define CFG_INIT_RAM_ADDR	CFG_IMMR
#define CFG_INIT_RAM_END	0x2F00	/* End of used area in DPRAM	*/
#define CFG_GBL_DATA_SIZE	68  /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
#define CFG_SDRAM_BASE		0x00000000
#define CFG_FLASH_BASE		0x40000000
#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
#define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
#else
#define CFG_MONITOR_LEN		(128 << 10)	/* Reserve 128 kB for Monitor	*/
#endif
#define CFG_MONITOR_BASE	CFG_FLASH_BASE
#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip	*/

#define CFG_FLASH_ERASE_TOUT	180000	/* Timeout for Flash Erase (in ms)	*/
#define CFG_FLASH_WRITE_TOUT	600	/* Timeout for Flash Write (in ms)	*/

#if 1
/* Put environment in flash which is much faster to boot */
#define CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_ADDR	    0x40040000	/* Address    of Environment Sector	*/
#define CFG_ENV_SIZE		0x2000	/* Total Size of Environment		*/
#define CFG_ENV_SECT_SIZE	0x40000 /* we have BIG sectors only :-(		*/
#else
/* Environment in EEPROM */
#define CFG_ENV_IS_IN_EEPROM	1
#define CFG_ENV_OFFSET		0
#define CFG_ENV_SIZE		2048
#endif
/*-----------------------------------------------------------------------
 * I2C/EEPROM Configuration
 */

#define CFG_I2C_AUDIO_ADDR	0x28	/* Audio volume control			*/
#define CFG_I2C_SYSMON_ADDR	0x2E	/* LM87 System Monitor			*/
#define CFG_I2C_RTC_ADDR	0x51	/* PCF8563 RTC				*/
#define CFG_I2C_POWER_A_ADDR	0x52	/* PCMCIA/USB power switch, channel A	*/
#define CFG_I2C_POWER_B_ADDR	0x53	/* PCMCIA/USB power switch, channel B	*/
#define CFG_I2C_KEYBD_ADDR	0x56	/* PIC LWE keyboard			*/
#define CFG_I2C_PICIO_ADDR	0x57	/* PIC IO Expander			*/