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📄 kup4k.h

📁 AT91RM9200的完整启动代码:包括loader, boot及U-boot三部分均已编译通过!欢迎下载使用!
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/* * (C) Copyright 2000, 2001, 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA *//* * board/config.h - configuration options, board specific * Derived from ../tqm8xx/tqm8xx.c */#ifndef __CONFIG_H#define __CONFIG_H/* * High Level Configuration Options * (easy to change) */#define CONFIG_MPC855		1	/* This is a MPC855 CPU		*/#define CONFIG_KUP4K		1	/* ...on a KUP4K module */#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/#undef	CONFIG_8xx_CONS_SMC2#undef	CONFIG_8xx_CONS_NONE#define CONFIG_BAUDRATE		115200	/* console baudrate		*/#if 0#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/#else#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second	*/#endif#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */#define CONFIG_BOARD_TYPES	1	/* support board types		*/#undef	CONFIG_BOOTARGS#define	CONFIG_EXTRA_ENV_SETTINGS					  \"slot_a_boot=setenv bootargs root=/dev/hda2 ip=off panic=1;\ diskboot 200000 0:1; bootm 200000\0"                                     \"slot_b_boot=setenv bootargs root=/dev/hda2 ip=off panic=1;\ diskboot 200000 2:1; bootm 200000\0"                                     \"nfs_boot=dhcp; run nfsargs addip; bootm 200000\0"                        \"panic_boot=echo No Bootdevice !!! reset\0"                               \"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsip):$(rootpath)\0" \"ramargs=setenv bootargs root=/dev/ram rw\0"			          \"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsip):$(gatewayip)\:$(netmask):$(hostname):$(netdev):off panic=1\0"                          \"netdev=eth0\0"                                                           \"load=tftp 200000 bootloader.bitmap;tftp 100000 u-boot.bin\0"             \"update=protect off 1:0-8;era 1:0-8;cp.b 100000 40000000 $(filesize);\cp.b 200000 40040000 14000\0"                                                   \"nfsip=192.168.2.19\0"#define CONFIG_BOOTCOMMAND  \    "run slot_a_boot;run slot_b_boot;run nfs_boot;run panic_boot"#define CONFIG_MISC_INIT_R  1#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/#define	CONFIG_STATUS_LED	1	/* Status LED enabled		*/#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)#define CONFIG_MAC_PARTITION#define CONFIG_DOS_PARTITION#define	CONFIG_RTC_MPC8xx		/* use internal RTC of MPC8xx	*/#define CONFIG_ETHADDR                  00:0B:64:00:00:00 /* our OUI from IEEE */#define CONFIG_KUP4K_LOGO               0x40040000  /* Address of logo bitmap *//* Define to allow the user to overwrite serial and ethaddr */#define CONFIG_ENV_OVERWRITE#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \				CFG_CMD_DHCP	| \				CFG_CMD_IDE	| \				CFG_CMD_DATE	)/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */#include <cmd_confdefs.h>/* * Miscellaneous configurable options */#define	CFG_LONGHELP			/* undef to save memory		*/#define	CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/#else#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/#endif#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define	CFG_MAXARGS	16		/* max number of command args	*/#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/#define	CFG_LOAD_ADDR		0x200000	/* default load address	*/#define	CFG_HZ		1000		/* decrementer freq: 1 ms ticks	*/#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }#define CFG_CONSOLE_INFO_QUIET 1/* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. *//*----------------------------------------------------------------------- * Internal Memory Mapped Register */#define CFG_IMMR		0xFFF00000/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */#define CFG_INIT_RAM_ADDR	CFG_IMMR#define	CFG_INIT_RAM_END	0x2F00	/* End of used area in DPRAM	*/#define	CFG_GBL_DATA_SIZE	64  /* size in bytes reserved for initial data */#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)#define	CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */#define	CFG_SDRAM_BASE		0x00000000#define CFG_FLASH_BASE		0x40000000#define	CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/#define CFG_MONITOR_BASE	CFG_FLASH_BASE#define	CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*//* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */#define	CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*//*----------------------------------------------------------------------- * FLASH organization */#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/#define CFG_MAX_FLASH_SECT	67	/* max number of sectors on one chip	*/#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/#define	CFG_ENV_IS_IN_FLASH	1#define	CFG_ENV_OFFSET		0x8000	/*   Offset   of Environment Sector	*/#define	CFG_ENV_SIZE		0x1000	/* Total Size of Environment Sector	*/#define CFG_ENV_SECT_SIZE       0x8000/* Address and size of Redundant Environment Sector	*/#if 0#define CFG_ENV_OFFSET_REDUND	(CFG_ENV_OFFSET+CFG_ENV_SIZE)#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)#endif/*----------------------------------------------------------------------- * Hardware Information Block */#if 0#define CFG_HWINFO_OFFSET	0x0003FFC0	/* offset of HW Info block */#define CFG_HWINFO_SIZE		0x00000040	/* size   of HW Info block */#define CFG_HWINFO_MAGIC	0x54514D38	/* 'TQM8' */#endif/*----------------------------------------------------------------------- * Cache Configuration */#define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/#endif/*----------------------------------------------------------------------- * SYPCR - System Protection Control				11-9 * SYPCR can only be written once after reset! *----------------------------------------------------------------------- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze */#if defined(CONFIG_WATCHDOG)#define CFG_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \			 SYPCR_SWE  | SYPCR_SWRI| SYPCR_SWP)#else#define CFG_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)#endif/*-----------------------------------------------------------------------

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