📄 hal_diag.c
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/*=============================================================================//// hal_diag.c//// HAL diagnostic output code////=============================================================================//####COPYRIGHTBEGIN####// // ------------------------------------------- // The contents of this file are subject to the Red Hat eCos Public License // Version 1.1 (the "License"); you may not use this file except in // compliance with the License. You may obtain a copy of the License at // http://www.redhat.com/ // // Software distributed under the License is distributed on an "AS IS" // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the // License for the specific language governing rights and limitations under // the License. // // The Original Code is eCos - Embedded Configurable Operating System, // released September 30, 1998. // // The Initial Developer of the Original Code is Red Hat. // Portions created by Red Hat are // Copyright (C) 1998, 1999, 2000 Red Hat, Inc. // All Rights Reserved. // ------------------------------------------- // //####COPYRIGHTEND####//=============================================================================//#####DESCRIPTIONBEGIN####//// Author(s): nickg, gthomas// Contributors:nickg, gthomas// Date: 1998-03-02// Purpose: HAL diagnostic output// Description: Implementations of HAL diagnostic output support.////####DESCRIPTIONEND####////===========================================================================*/#include <pkgconf/hal.h>#include <pkgconf/system.h>#include CYGBLD_HAL_PLATFORM_H#include <cyg/infra/cyg_type.h> // base types#include <cyg/infra/cyg_trac.h> // tracing macros#include <cyg/infra/cyg_ass.h> // assertion macros#include <cyg/hal/hal_arch.h> // basic machine info#include <cyg/hal/hal_intr.h> // interrupt macros#include <cyg/hal/hal_io.h> // IO macros#include <cyg/hal/hal_if.h> // calling interface API#include <cyg/hal/hal_misc.h> // helper functions#include <cyg/hal/hal_diag.h>#include <cyg/hal/hal_sa110.h> // Hardware definitions#include <cyg/hal/drv_api.h> // cyg_drv_interrupt_acknowledge/*---------------------------------------------------------------------------*/struct sa110_serial { volatile cyg_uint32 data_register; volatile cyg_uint32 rxstat; volatile cyg_uint32 h_baud_control; volatile cyg_uint32 m_baud_control; volatile cyg_uint32 l_baud_control; volatile cyg_uint32 control_register; volatile cyg_uint32 flag_register;};/*---------------------------------------------------------------------------*/static voidinit_channel(void* __ch_data){ volatile struct sa110_serial* base = (struct sa110_serial*)__ch_data; int dummy; /* * Make sure everything is off */ base->control_register = SA110_UART_DISABLED | SA110_SIR_DISABLED; /* * Read the RXStat to drain the fifo */ dummy = base->rxstat; /* * Set the baud rate - this also turns the uart on. * * Note that the ordering of these writes is critical, * and the writes to the H_BAUD_CONTROL and CONTROL_REGISTER * are necessary to force the UART to update its register * contents. */ base->l_baud_control = 0x13; // bp->divisor_low; base->m_baud_control = 0x00; // bp->divisor_high; base->h_baud_control = SA110_UART_BREAK_DISABLED | SA110_UART_PARITY_DISABLED | SA110_UART_STOP_BITS_ONE | SA110_UART_FIFO_ENABLED | SA110_UART_DATA_LENGTH_8_BITS; base->control_register = SA110_UART_ENABLED | SA110_SIR_DISABLED; // All done}voidcyg_hal_plf_serial_putc(void *__ch_data, char c){ volatile struct sa110_serial* base = (struct sa110_serial*)__ch_data; CYGARC_HAL_SAVE_GP(); // Wait for Tx FIFO not full while ((base->flag_register & SA110_TX_FIFO_STATUS_MASK) == SA110_TX_FIFO_BUSY) ; base->data_register = c; CYGARC_HAL_RESTORE_GP();}static cyg_boolcyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch){ volatile struct sa110_serial* base = (struct sa110_serial*)__ch_data; if ((base->flag_register & SA110_RX_FIFO_STATUS_MASK) == SA110_RX_FIFO_EMPTY) return false; *ch = (char)(base->data_register & 0xFF); return true;}cyg_uint8cyg_hal_plf_serial_getc(void* __ch_data){ cyg_uint8 ch; CYGARC_HAL_SAVE_GP(); while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)); CYGARC_HAL_RESTORE_GP(); return ch;}#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) \ || defined(CYGPRI_HAL_IMPLEMENTS_IF_SERVICES)static cyg_int32 msec_timeout;static voidcyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf, cyg_uint32 __len){ CYGARC_HAL_SAVE_GP(); while(__len-- > 0) cyg_hal_plf_serial_putc(__ch_data, *__buf++); CYGARC_HAL_RESTORE_GP();}static voidcyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len){ CYGARC_HAL_SAVE_GP(); while(__len-- > 0) *__buf++ = cyg_hal_plf_serial_getc(__ch_data); CYGARC_HAL_RESTORE_GP();}cyg_boolcyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch){ int delay_count; cyg_bool res; CYGARC_HAL_SAVE_GP(); delay_count = msec_timeout * 10; // delay in .1 ms steps for(;;) { res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch); if (res || 0 == delay_count--) break; CYGACC_CALL_IF_DELAY_US(100); } CYGARC_HAL_RESTORE_GP(); return res;}static intcyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...){ static int irq_state = 0; int ret = 0; CYGARC_HAL_SAVE_GP(); switch (__func) { case __COMMCTL_IRQ_ENABLE: irq_state = 1; HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_SERIAL_RX); break; case __COMMCTL_IRQ_DISABLE: ret = irq_state; irq_state = 0; HAL_INTERRUPT_MASK(CYGNUM_HAL_INTERRUPT_SERIAL_RX); break; case __COMMCTL_DBG_ISR_VECTOR: ret = CYGNUM_HAL_INTERRUPT_SERIAL_RX; break; case __COMMCTL_SET_TIMEOUT: { va_list ap; va_start(ap, __func); ret = msec_timeout; msec_timeout = va_arg(ap, cyg_uint32); va_end(ap); } default: break; } CYGARC_HAL_RESTORE_GP(); return ret;}static intcyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data){ int reg, res = 0; volatile struct sa110_serial* base = (struct sa110_serial*)__ch_data; char c; CYGARC_HAL_SAVE_GP(); if ( CYGNUM_HAL_INTERRUPT_SERIAL_RX == __vector ) { reg = base->flag_register; // read it anyway just in case - no harm done and we might // prevent an interrup loop c = (char)(base->data_register & 0xFF); cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_SERIAL_RX); *__ctrlc = 0; if ( (reg & SA110_RX_FIFO_STATUS_MASK) != SA110_RX_FIFO_EMPTY ) { if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; } res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res;}
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