hal_platform_setup.h

Intel XScale PXA255 引导Linux的Redboot 版bootloader源代码！

#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
#define CYGONCE_HAL_PLATFORM_SETUP_H

/*=============================================================================
//
//      hal_platform_setup.h
//
//      Platform specific support for HAL (assembly code)
//
//=============================================================================
//####COPYRIGHTBEGIN####
//                                                                          
// -------------------------------------------                              
// The contents of this file are subject to the Red Hat eCos Public License 
// Version 1.1 (the "License"); you may not use this file except in         
// compliance with the License.  You may obtain a copy of the License at    
// http://www.redhat.com/                                                   
//                                                                          
// Software distributed under the License is distributed on an "AS IS"      
// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied.  See the 
// License for the specific language governing rights and limitations under 
// the License.                                                             
//                                                                          
// The Original Code is eCos - Embedded Configurable Operating System,      
// released September 30, 1998.                                             
//                                                                          
// The Initial Developer of the Original Code is Red Hat.                   
// Portions created by Red Hat are                                          
// Copyright (C) 1998, 1999, 2000 Red Hat, Inc.                             
// All Rights Reserved.                                                     
// -------------------------------------------                              
//                                                                          
//####COPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    hmt
// Contributors: hmt, gthomas
// Date:         1999-04-21
// Purpose:      Intel SA110 platform specific support routines
// Description: 
// Usage:       #include <cyg/hal/hal_platform_setup.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/

#include <pkgconf/system.h>             // System-wide configuration info
#include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration
#include <cyg/hal/hal_sa110.h>          // Platform specific hardware definitions
#include <cyg/hal/hal_mmu.h>            // MMU definitions

// Note that we do NOT define CYGHWR_HAL_ARM_HAS_MMU so that at reset we
// jump straight into the ROM; this makes it unnecessary to take any
// special steps to switch from executing in the ROM alias at low
// addresses.  Make no difference for RAM start.


// Define macro used to diddle the LEDs during early initialization.
// Can use r0+r1.  Argument in \x.
#define _CYGHWR_LED_MACRO                                                  \
        ldr     r0,=0x42000148    /* SA110_XBUS_CYCLE_ARBITER */          ;\
        ldr     r0,[r0]                                                   ;\
        tsts    r0,#0x00800000 /* SA110_XBUS_CYCLE_ARBITER_ENABLED */     ;\
        bne     667f              /* Don't touch if PCI arbiter enabled */;\
        ldr     r0,=0x40012800    /* SA110_XBUS_XCS2 */                   ;\
        mov     r1,#7&(~(\x))                                             ;\
        str     r1,[r0]                                                   ;\
667:

#define CYGHWR_LED_MACRO

// The main useful output of this file is PLATFORM_SETUP1: it invokes lots
// of other stuff (may depend on RAM or ROM start).  The other stuff is
// divided into further macros to make it easier to manage what's enabled
// when.

//#if defined(CYG_HAL_STARTUP_ROM) ||                     \
//    defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) ||      \
//    !defined(CYGSEM_HAL_USE_ROM_MONITOR)

// Dependence on ROM/RAM start removed when meminit code fixed up.
// But it re-emerged when RedBoot's desire to live over RAM app
// initialization asserted itself.
//
// The correct thing is to re-initialize everything if any of:
//  o You are in ROM (duh!)
//  o You include your own stubs (ergo rule the world)
//  o You do not cooperate with a ROM Monitor
//
// [The latter two probably mean the same thing, but this way also lets us
//  support a standalone RAM startup app with no stubs in it. ]
// Hence the more complex conditional above.  See comments in the ChangeLog
// and plf_io.h wrt initializing the PCI bus world.

// R1 - count
// R3 - value
// Bit 0 = RED, Bit 1 = GREEN  (0 = on)
#define DO_LED                                   \
        ldr	r2,=0x40012000                  ;\
10:     str	r3,[r2]                         ;\
        ldr     r4,=0x10000                     ;\
15:     sub     r4,r4,#1                        ;\
        cmp     r4,#0                           ;\
        bne     15b                             ;\
        mov     r4,#3                           ;\
        str     r4,[r2]                         ;\
        ldr     r4,=0x8000                      ;\
15:     sub     r4,r4,#1                        ;\
        cmp     r4,#0                           ;\
        bne     15b                             ;\
        sub     r1,r1,#1                        ;\
        cmp     r1,#0                           ;\
        bne     10b                             ;

#if defined(CYG_HAL_STARTUP_ROM)

#define PLATFORM_SETUP1                                 \
        INTEL_SDRAM_INIT                                \
        PLATFORM_FLUSH_DISABLE_CACHES                   \
/*        INIT_XBUS_ACCESS                                */ \
        ALLOW_CLOCK_SWITCHING                           \
/*        CALL_MEMINIT_CODE                              */ \
        BASIC_PCI_SETUP                                 
#else
#define PLATFORM_SETUP1
#endif

#define INTEL_SDRAM_INIT                                                                \
		/* form the base X-Bus CS2 address in r0 */                             ;\
        LDR	r0, =0x40012000                                                         ;\
	MOV	r3, #2		                                                        ;\
        STR	r3, [r0]    /*Turn red LED on */                                        ;\
                                                                                        ;\
                                                                                        ;\
/* Enable the I cache */                                                                ;\
	/* set in the SA-110 control register bit 12=1,  */                             ;\
	/* and write it back. */                                                        ;\
	MOV	r0, #0x1000                                                             ;\
	MCR	p15, 0, r0, c1, c0, 0                                                   ;\
                                                                                        ;\
/* SDRAM all banks precharge. Do a read from each array (even those not */              ;\
/* used) so that the "dqm" signal will be dropped low. Data returned is */              ;\
/* ignored. */                                                                          ;\
                                                                                        ;\
	MOV	r0, #0x40000000		/* Array 0 */                                   ;\
	LDR	r1, [r0]                                                                ;\
                                                                                        ;\
	ADD	r0, r0, #0x00004000	/* Array 1 */                                   ;\
	LDR	r1, [r0]                                                                ;\
                                                                                        ;\
	ADD	r0, r0, #0x00004000	/* Array 2 */                                   ;\
	LDR	r1, [r0]                                                                ;\
                                                                                        ;\
	ADD	r0, r0, #0x00004000	/* Array 3 */                                   ;\
	LDR	r1, [r0]                                                                ;\
                                                                                        ;\
                                                                                        ;\
/* This code assumes that it starts up from a reset. Therefore we know that  */         ;\
/* we don't have to turn off memory refresh, and wait many cycles to make  */           ;\
/* sure that the memory is quiescent. */                                                ;\
                                                                                        ;\
	/* Prior to the first SDRAM access we must setup the SDRAM */                   ;\
	/* internal mode registers. The initial Mahwah board has  */                    ;\