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S3C2410 Vivi bootloader源代码。可以快速编译生成适应自己目标板的Loader。

#endif @ CONFIG_S3C2410_NAND_BOOT


#ifdef CONFIG_BOOTUP_MEMTEST
@
@ Simple memory test function
@
memtest:
	mov	r10, lr

#ifdef CONFIG_DEBUG_LL
	mov	r0, #'M'
	ldr	r1, SerBase
	bl	PrintChar
	mov	r0, #'T'
	ldr	r1, SerBase
	bl	PrintChar
	mov	r0, #'S'
	ldr	r1, SerBase
	bl	PrintChar
	mov	r0, #'T'
	ldr	r1, SerBase
	bl	PrintChar
	mov	r0, #' '
	ldr	r1, SerBase
	bl	PrintChar
#endif

        /* check the first 1MB  in increments of 4k */
        mov     r7, #0x1000 
        mov     r6, r7, lsl #8  /* 4k << 2^8 = 1MB */
        mov     r5, #DRAM_BASE

mem_test_loop:
        mov     r0, r5  
        bl      testram_nostack 
        teq     r0, #1  
        beq     badram  

        add     r5, r5, r7
        subs    r6, r6, r7
        bne     mem_test_loop


	@ the first megabyte is OK. so let us clear it.
        mov     r0, #((1024 * 1024) / (8 * 4))	@ 1MB in steps of 32 bytes
        mov     r1, #DRAM_BASE
        mov     r2, #0  
        mov     r3, #0  
        mov     r4, #0  
        mov     r5, #0  
        mov     r6, #0  
        mov     r7, #0  
        mov     r8, #0  
        mov     r9, #0  

clear_loop_memtest:
        stmia   r1!, {r2-r9} 
        subs    r0, r0, #(8 * 4)
        bne     clear_loop_memtest

#ifdef CONFIG_DEBUG_LL
	ldr	r0, STR_OK
	ldr	r1, SerBase
	bl	PrintWord
#endif

	mov	pc, r10		@ return

badram: 
#ifdef CONFIG_DEBUG_LL
	ldr	r0, STR_FAIL
	ldr	r1, SerBase
	bl	PrintWord
#endif
1:	b	1b		@ loop 


@ testmem.S: memory tester, test if there is RAM available at given location
@
@ Copyright (C) 2001 Russell King ([e-mail])
@
@ This version clobbers registers r1-r4, so be sure to store their contents
@ in a safe position. This function is not APCS compliant, so only use it
@ from assembly code.
@
@ r0 = address to test 
@ returns r0 = 0 - ram present, r0 = 1 - no ram
@ clobbers r1 - r4 
ENTRY(testram_nostack)
        ldmia   r0, {r1, r2}    @ store current value in r1 and r2
        mov     r3, #0x55       @ write 0x55 to first word
        mov     r4, #0xaa       @ 0xaa to second
        stmia   r0, {r3, r4}
        ldmia   r0, {r3, r4}    @ read it back 
        teq     r3, #0x55       @ do the values match
        teqeq   r4, #0xaa
        bne     bad             @ oops, no
        mov     r3, #0xaa       @ write 0xaa to first word
        mov     r4, #0x55       @ 0x55 to second
        stmia   r0, {r3, r4}
        ldmia   r0, {r3, r4}    @ read it back 
        teq     r3, #0xaa       @ do the values match
        teqeq   r4, #0x55
bad:    stmia   r0, {r1, r2}    @ in any case, restore old data
        moveq   r0, #0          @ ok - all values matched 
        movne   r0, #1          @ no ram at this location
        mov     pc, lr 

#endif @ CONFIG_BOOTUP_MEMTEST



@ Initialize UART
@
@ r0 = number of UART port
InitUART:
	ldr	r1, SerBase
	mov	r2, #0x0
	str	r2, [r1, #oUFCON]
	str	r2, [r1, #oUMCON]
	mov	r2, #0x3
	str	r2, [r1, #oULCON]
	ldr	r2, =0x245
	str	r2, [r1, #oUCON]
#define UART_BRD (( vUART_FREQ / (UART_BAUD_RATE * 16)) - 1)
	mov	r2, #UART_BRD
	str	r2, [r1, #oUBRDIV]

	mov	r3, #100
	mov	r2, #0x0
1:	sub	r3, r3, #0x1
	tst	r2, r3
	bne	1b

#if 0
	mov	r2, #'U'
	str	r2, [r1, #oUTXHL]

1:	ldr	r3, [r1, #oUTRSTAT]
	and	r3, r3, #UTRSTAT_TX_EMPTY
	tst	r3, #UTRSTAT_TX_EMPTY
	bne	1b	

	mov	r2, #'x'
	str	r2, [r1, #oUTXHL]

1:	ldr	r3, [r1, #oUTRSTAT]
	and	r3, r3, #UTRSTAT_TX_EMPTY
	tst	r3, #UTRSTAT_TX_EMPTY
	bne	1b	
#endif

	mov	pc, lr


@
@ Exception handling functions
@
HandleUndef:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_UNDEF
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandleSWI:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_SWI
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandlePrefetchAbort:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_PREFETCH_ABORT
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandleDataAbort:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_DATA_ABORT
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandleIRQ:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_IRQ
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandleFIQ:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_FIQ
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop

HandleNotUsed:
#ifdef CONFIG_DEBUG_LL
	mov	r12, r14
	ldr	r0, STR_NOT_USED
	ldr	r1, SerBase
	bl	PrintWord
	bl	PrintFaultAddr
#endif
1:	b	1b		@ infinite loop


@
@ Low Level Debug
@
#ifdef CONFIG_DEBUG_LL

@
@ PrintFaultAddr: Print falut address
@
@ r12: contains address of instruction + 4
@
PrintFaultAddr:
	mov	r0, r12			@ Print address of instruction + 4
	ldr	r1, SerBase
	bl	PrintHexWord
	mrc	p15, 0, r0, c6, c0, 0	@ Read fault virtual address
	ldr	r1, SerBase
	bl	PrintHexWord
	mov	pc, lr

@ PrintHexNibble : prints the least-significant nibble in R0 as a
@ hex digit
@   r0 contains nibble to write as Hex
@   r1 contains base of serial port
@   writes ro with XXX, modifies r0,r1,r2
@   TODO : write ro with XXX reg to error handling
@   Falls through to PrintChar
PrintHexNibble:
	adr	r2, HEX_TO_ASCII_TABLE
	and	r0, r0, #0xF
	ldr	r0, [r2, r0]	@ convert to ascii
	b	PrintChar

@ PrintChar : prints the character in R0
@   r0 contains the character
@   r1 contains base of serial port
@   writes ro with XXX, modifies r0,r1,r2
@   TODO : write ro with XXX reg to error handling
PrintChar:
TXBusy:
	ldr	r2, [r1, #oUTRSTAT]
	and	r2, r2, #UTRSTAT_TX_EMPTY
	tst	r2, #UTRSTAT_TX_EMPTY
	beq	TXBusy	
	str	r0, [r1, #oUTXHL]
	mov	pc, lr

@ PrintWord : prints the 4 characters in R0
@   r0 contains the binary word
@   r1 contains the base of the serial port
@   writes ro with XXX, modifies r0,r1,r2
@   TODO : write ro with XXX reg to error handling
PrintWord:
	mov	r3, r0
	mov	r4, lr
	bl	PrintChar

	mov	r0, r3, LSR #8		/* shift word right 8 bits */
	bl	PrintChar

	mov	r0, r3, LSR #16		/* shift word right 16 bits */
	bl	PrintChar
	
	mov	r0, r3, LSR #24		/* shift word right 24 bits */
	bl	PrintChar

	mov	r0, #'\r'
	bl	PrintChar

	mov	r0, #'\n'
	bl	PrintChar

	mov	pc, r4

@ PrintHexWord : prints the 4 bytes in R0 as 8 hex ascii characters
@   followed by a newline
@   r0 contains the binary word
@   r1 contains the base of the serial port
@   writes ro with XXX, modifies r0,r1,r2
@   TODO : write ro with XXX reg to error handling
PrintHexWord:
	mov	r4, lr
	mov	r3, r0
	mov	r0, r3, LSR #28
	bl	PrintHexNibble
	mov	r0, r3, LSR #24
	bl	PrintHexNibble
	mov	r0, r3, LSR #20
	bl	PrintHexNibble
	mov	r0, r3, LSR #16
	bl	PrintHexNibble
	mov	r0, r3, LSR #12
	bl	PrintHexNibble
	mov	r0, r3, LSR #8
	bl	PrintHexNibble
	mov	r0, r3, LSR #4
	bl	PrintHexNibble
	mov	r0, r3
	bl	PrintHexNibble

	mov	r0, #'\r'
	bl	PrintChar

	mov	r0, #'\n'
	bl	PrintChar

	mov	pc, r4
#endif
	
@
@ Data Area
@
@ Memory configuration values
.align 4
mem_cfg_val:
	.long	vBWSCON
	.long	vBANKCON0
	.long	vBANKCON1
	.long	vBANKCON2
	.long	vBANKCON3
	.long	vBANKCON4
	.long	vBANKCON5
	.long	vBANKCON6
	.long	vBANKCON7
	.long	vREFRESH
	.long	vBANKSIZE
	.long	vMRSRB6
	.long	vMRSRB7

@ Processor clock values
.align 4
clock_locktime:
	.long	vLOCKTIME
mpll_50mhz:
	.long	vMPLLCON_50
#ifdef CONFIG_S3C2410_MPORT1
mpll_100mhz:
	.long   vMPLLCON_100
#endif
mpll_user:
	.long	vMPLLCON_USER
uart_freq:
	.long	vUART_FREQ
clock_clkcon:
	.long	vCLKCON
clock_clkdivn:
	.long	vCLKDIVN
@ initial values for serial
uart_ulcon:
	.long	vULCON
uart_ucon:
	.long	vUCON
uart_ufcon:
	.long	vUFCON
uart_umcon:
	.long	vUMCON
@ inital values for GPIO
gpio_con_uart:
	.long	vGPHCON
gpio_up_uart:
	.long	vGPHUP

	.align	2
DW_STACK_START:
	.word	STACK_BASE+STACK_SIZE-4

#ifdef CONFIG_DEBUG_LL
	.align	2
HEX_TO_ASCII_TABLE:
	.ascii	"0123456789ABCDEF"
STR_STACK:
	.ascii	"STKP"
STR_UNDEF:
	.ascii	"UNDF"
STR_SWI:
	.ascii	"SWI "
STR_PREFETCH_ABORT:
	.ascii	"PABT"
STR_DATA_ABORT:
	.ascii	"DABT"
STR_IRQ:
	.ascii	"IRQ "
STR_FIQ:
	.ascii	"FIQ"
STR_NOT_USED:
	.ascii	"NUSD"
	.align 2
STR_OK:
	.ascii	"OK  "
STR_FAIL:
	.ascii	"FAIL"
STR_CR:
	.ascii  "\r\n"
#endif

.align 4
SerBase:
#if defined(CONFIG_SERIAL_UART0)
	.long UART0_CTL_BASE
#elif defined(CONFIG_SERIAL_UART1)
	.long UART1_CTL_BASE
#elif defined(CONFIG_SERIAL_UART2)
	.long UART2_CTL_BASE
#else
#error not defined base address of serial
#endif

#ifdef CONFIG_PM
.align 4
PMCTL0_ADDR:
	.long 0x4c00000c
PMCTL1_ADDR:
	.long 0x56000080
PMST_ADDR:
	.long 0x560000B4
PMSR0_ADDR:
	.long 0x560000B8
REFR_ADDR:
	.long 0x48000024
#endif