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📄 prim_ops.c

📁 针对linux休眠suspend显卡状态保存恢复的一个办法
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	CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the borrow chain.  See note at top */    bc = (res & (~d | s)) | (~d & s);	CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);	CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return d;}/****************************************************************************REMARKS:Implements the CMP instruction and side effects.****************************************************************************/u32 cmp_long(u32 d, u32 s){	register u32 res;   /* all operands in native machine order */	register u32 bc;	res = d - s;	CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);	CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the borrow chain.  See note at top */	bc = (res & (~d | s)) | (~d & s);	CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);	CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return d;}/****************************************************************************REMARKS:Implements the DAA instruction and side effects.****************************************************************************/u8 daa_byte(u8 d){	u32 res = d;	if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {		res += 6;		SET_FLAG(F_AF);	}	if (res > 0x9F || ACCESS_FLAG(F_CF)) {		res += 0x60;		SET_FLAG(F_CF);	}	CONDITIONAL_SET_FLAG(res & 0x80, F_SF);	CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	return (u8)res;}/****************************************************************************REMARKS:Implements the DAS instruction and side effects.****************************************************************************/u8 das_byte(u8 d){	if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {		d -= 6;		SET_FLAG(F_AF);	}	if (d > 0x9F || ACCESS_FLAG(F_CF)) {		d -= 0x60;		SET_FLAG(F_CF);	}	CONDITIONAL_SET_FLAG(d & 0x80, F_SF);	CONDITIONAL_SET_FLAG(d == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF);	return d;}/****************************************************************************REMARKS:Implements the DEC instruction and side effects.****************************************************************************/u8 dec_byte(u8 d){    register u32 res;   /* all operands in native machine order */    register u32 bc;    res = d - 1;	CONDITIONAL_SET_FLAG(res & 0x80, F_SF);	CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the borrow chain.  See note at top */	/* based on sub_byte, uses s==1.  */	bc = (res & (~d | 1)) | (~d & 1);	/* carry flag unchanged */	CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return (u8)res;}/****************************************************************************REMARKS:Implements the DEC instruction and side effects.****************************************************************************/u16 dec_word(u16 d){    register u32 res;   /* all operands in native machine order */    register u32 bc;    res = d - 1;	CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);	CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);    /* calculate the borrow chain.  See note at top */    /* based on the sub_byte routine, with s==1 */    bc = (res & (~d | 1)) | (~d & 1);    /* carry flag unchanged */	CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return (u16)res;}/****************************************************************************REMARKS:Implements the DEC instruction and side effects.****************************************************************************/u32 dec_long(u32 d){    register u32 res;   /* all operands in native machine order */    register u32 bc;    res = d - 1;	CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);	CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);    /* calculate the borrow chain.  See note at top */	bc = (res & (~d | 1)) | (~d & 1);	/* carry flag unchanged */	CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return res;}/****************************************************************************REMARKS:Implements the INC instruction and side effects.****************************************************************************/u8 inc_byte(u8 d){	register u32 res;   /* all operands in native machine order */	register u32 cc;	res = d + 1;	CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x80, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the carry chain  SEE NOTE AT TOP. */	cc = ((1 & d) | (~res)) & (1 | d);	CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);	CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);	return (u8)res;}/****************************************************************************REMARKS:Implements the INC instruction and side effects.****************************************************************************/u16 inc_word(u16 d){	register u32 res;   /* all operands in native machine order */	register u32 cc;	res = d + 1;	CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the carry chain  SEE NOTE AT TOP. */	cc = (1 & d) | ((~res) & (1 | d));	CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);	CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);	return (u16)res;}/****************************************************************************REMARKS:Implements the INC instruction and side effects.****************************************************************************/u32 inc_long(u32 d){	register u32 res;   /* all operands in native machine order */	register u32 cc;	res = d + 1;	CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the carry chain  SEE NOTE AT TOP. */	cc = (1 & d) | ((~res) & (1 | d));	CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);	CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u8 or_byte(u8 d, u8 s){	register u8 res;    /* all operands in native machine order */	res = d | s;	CLEAR_FLAG(F_OF);	CLEAR_FLAG(F_CF);	CLEAR_FLAG(F_AF);	CONDITIONAL_SET_FLAG(res & 0x80, F_SF);	CONDITIONAL_SET_FLAG(res == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res), F_PF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u16 or_word(u16 d, u16 s){	register u16 res;   /* all operands in native machine order */	res = d | s;	/* set the carry flag to be bit 8 */	CLEAR_FLAG(F_OF);	CLEAR_FLAG(F_CF);	CLEAR_FLAG(F_AF);	CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);	CONDITIONAL_SET_FLAG(res == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u32 or_long(u32 d, u32 s){	register u32 res;   /* all operands in native machine order */	res = d | s;	/* set the carry flag to be bit 8 */	CLEAR_FLAG(F_OF);	CLEAR_FLAG(F_CF);	CLEAR_FLAG(F_AF);	CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);	CONDITIONAL_SET_FLAG(res == 0, F_ZF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u8 neg_byte(u8 s){    register u8 res;    register u8 bc;	CONDITIONAL_SET_FLAG(s != 0, F_CF);	res = (u8)-s;	CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x80, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res), F_PF);	/* calculate the borrow chain --- modified such that d=0.	   substitutiing d=0 into     bc= res&(~d|s)|(~d&s);	   (the one used for sub) and simplifying, since ~d=0xff...,	   ~d|s == 0xffff..., and res&0xfff... == res.  Similarly	   ~d&s == s.  So the simplified result is: */	bc = res | s;	CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u16 neg_word(u16 s){	register u16 res;	register u16 bc;	CONDITIONAL_SET_FLAG(s != 0, F_CF);	res = (u16)-s;	CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the borrow chain --- modified such that d=0.	   substitutiing d=0 into     bc= res&(~d|s)|(~d&s);	   (the one used for sub) and simplifying, since ~d=0xff...,	   ~d|s == 0xffff..., and res&0xfff... == res.  Similarly	   ~d&s == s.  So the simplified result is: */	bc = res | s;	CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return res;}/****************************************************************************REMARKS:Implements the OR instruction and side effects.****************************************************************************/u32 neg_long(u32 s){	register u32 res;	register u32 bc;	CONDITIONAL_SET_FLAG(s != 0, F_CF);	res = (u32)-s;	CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);	CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);	CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);	/* calculate the borrow chain --- modified such that d=0.	   substitutiing d=0 into     bc= res&(~d|s)|(~d&s);	   (the one used for sub) and simplifying, since ~d=0xff...,	   ~d|s == 0xffff..., and res&0xfff... == res.  Similarly	   ~d&s == s.  So the simplified result is: */	bc = res | s;	CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);	CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);	return res;}/****************************************************************************REMARKS:Implements the NOT instruction and side effects.****************************************************************************/u8 not_byte(u8 s){	return ~s;}/****************************************************************************REMARKS:Implements the NOT instruction and side effects.****************************************************************************/u16 not_word(u16 s){	return ~s;}/****************************************************************************REMARKS:Implements the NOT instruction and side effects.****************************************************************************/u32 not_long(u32 s){	return ~s;}/****************************************************************************REMARKS:Implements the RCL instruction and side effects.****************************************************************************/u8 rcl_byte(u8 d, u8 s){    register unsigned int res, cnt, mask, cf;    /* s is the rotate distance.  It varies from 0 - 8. */	/* have       CF  B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0        want to rotate through the carry by "s" bits.  We could        loop, but that's inefficient.  So the width is 9,       and we split into three parts:       The new carry flag   (was B_n)       the stuff in B_n-1 .. B_0       the stuff in B_7 .. B_n+1       The new rotate is done mod 9, and given this,       for a rotation of n bits (mod 9) the new carry flag is       then located n bits from the MSB.  The low part is        then shifted up cnt bits, and the high part is or'd       in.  Using CAPS for new values, and lowercase for the        original values, this can be expressed as:       IF n > 0        1) CF <-  b_(8-n)       2) B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0       3) B_(n-1) <- cf       4) B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1))	 */	res = d;	if ((cnt = s % 9) != 0) {        /* extract the new CARRY FLAG. */        /* CF <-  b_(8-n)             */        cf = (d >> (8 - cnt)) & 0x1;        /* get the low stuff which rotated            into the range B_7 .. B_cnt */        /* B_(7) .. B_(n)  <-  b_(8-(n+1)) .. b_0  */        /* note that the right hand side done by the mask */		res = (d << cnt) & 0xff;        /* now the high stuff which rotated around            into the positions B_cnt-2 .. B_0 */        /* B_(n-2) .. B_0 <-  b_7 .. b_(8-(n-1)) */        /* shift it downward, 7-(n-2) = 9-n positions.            and mask off the result before or'ing in.          */        mask = (1 << (cnt - 1)) - 1;        res |= (d >> (9 - cnt)) & mask;        /* if the carry flag was set, or it in.  */		if (ACCESS_FLAG(F_CF)) {     /* carry flag is set */            /*  B_(n-1) <- cf */            res |= 1 << (cnt - 1);        }        /* set the new carry flag, based on the variable "cf" */		CONDITIONAL_SET_FLAG(cf, F_CF);        /* OVERFLOW is set *IFF* cnt==1, then it is the            xor of CF and the most significant bit.  Blecck. */        /* parenthesized this expression since it appears to           be causing OF to be misset */        CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),							 F_OF);    }	return (u8)res;}/****************************************************************************REMARKS:Implements the RCL instruction and side effects.****************************************************************************/u16 rcl_word(u16 d, u8 s){	register unsigned int res, cnt, mask, cf;	res = d;	if ((cnt = s % 17) != 0) {		cf = (d >> (16 - cnt)) & 0x1;		res = (d << cnt) & 0xffff;		mask = (1 << (cnt - 1)) - 1;		res |= (d >> (17 - cnt)) & mask;		if (ACCESS_FLAG(F_CF)) {			res |= 1 << (cnt - 1);		}		CONDITIONAL_SET_FLAG(cf, F_CF);		CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),							 F_OF);	}	return (u16)res;}/****************************************************************************REMARKS:Implements the RCL instruction and side effects.

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