s3c2410.h

基于s3c2440的U盘读写程序

//=============================================================================
// File Name : s3c2410.h
// Function  : S3C2410 Define Address Register
// Program   : Shin, On Pil (SOP)
// Date      : May 06, 2002
// Version   : 0.0
// History
//   0.0 : Programming start (February 15,2002) -> SOP
//         INTERRUPT rPRIORITY 0x4a00000a -> 0x4a00000c       (May 02, 2002 SOP)
//         RTC BCD DAY and DATE Register Name Correction      (May 06, 2002 SOP) 
//=============================================================================
#ifndef __S3C2410_H__
#define __S3C2410_H__
#include"2440addr.h" 
#ifdef __cplusplus
extern "C" 
{
 #endif
    /* data type definitions */
    #ifndef U32
    #define U32 unsigned long
    #endif
    #ifndef S32
    #define S32 signed long
    #endif
    #ifndef I32
    #define I32 long
    #endif
    #ifndef U16
    #define U16 unsigned short
    #endif
    #ifndef S16
    #define S16 signed short
    #endif
    #ifndef I16
    #define I16 short
    #endif
    #ifndef U8
    #define U8  unsigned char
    #endif
    #ifndef S8
    #define S8  signed char
    #endif
    #ifndef I8
    #define I8  char
    #endif
    #ifndef __u8
    #define __u8 unsigned char
    #endif
    #ifndef __u16
    #define __u16 unsigned short
    #endif
    #ifndef __u32
    #define __u32 unsigned long
    #endif
    #ifndef NULL
    #define NULL	0
    #endif
    typedef volatile U8    S3C24X0_REG8;
    typedef volatile U16   S3C24X0_REG16;
    typedef volatile U32   S3C24X0_REG32;
    typedef volatile unsigned long	vu_long;
    typedef volatile unsigned short    vu_short;
    typedef volatile unsigned char	vu_char;
    #ifndef u_char
    #define  u_char  unsigned char
    #endif
    #ifndef u_short
    #define   u_short unsigned short
    #endif
    #ifndef u_int
    #define   u_int unsigned int
    #endif
    #ifndef u_long
    #define   u_long unsigned long
    #endif
    #ifndef uchar
    #define   uchar unsigned char
    #endif
    #ifndef ushort
    #define   ushort unsigned short
    #endif
    #ifndef uint
    #define   uint unsigned int
    #endif
    #ifndef ulong
    #define   ulong unsigned long	
    #endif
    /* Memory controller (see manual chapter 5) */
    __packed
		typedef struct 
    {
        S3C24X0_REG32	BWSCON;
        S3C24X0_REG32	BANKCON[8];
        S3C24X0_REG32	REFRESH;
        S3C24X0_REG32	BANKSIZE;
        S3C24X0_REG32	MRSRB6;
        S3C24X0_REG32	MRSRB7;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_MEMCTL;
    /* USB HOST (see manual chapter 12) */
    __packed 
		typedef struct 
    {
        S3C24X0_REG32	HcRevision;
        S3C24X0_REG32	HcControl;
        S3C24X0_REG32	HcCommonStatus;
        S3C24X0_REG32	HcInterruptStatus;
        S3C24X0_REG32	HcInterruptEnable;
        S3C24X0_REG32	HcInterruptDisable;
        S3C24X0_REG32	HcHCCA;
        S3C24X0_REG32	HcPeriodCuttendED;
        S3C24X0_REG32	HcControlHeadED;
        S3C24X0_REG32	HcControlCurrentED;
        S3C24X0_REG32	HcBulkHeadED;
        S3C24X0_REG32	HcBuldCurrentED;
        S3C24X0_REG32	HcDoneHead;
        S3C24X0_REG32	HcRmInterval;
        S3C24X0_REG32	HcFmRemaining;
        S3C24X0_REG32	HcFmNumber;
        S3C24X0_REG32	HcPeriodicStart;
        S3C24X0_REG32	HcLSThreshold;
        S3C24X0_REG32	HcRhDescriptorA;
        S3C24X0_REG32	HcRhDescriptorB;
        S3C24X0_REG32	HcRhStatus;
        S3C24X0_REG32	HcRhPortStatus1;
        S3C24X0_REG32	HcRhPortStatus2;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_USB_HOST;
    /* INTERRUPT (see manual chapter 14) */
    __packed 
		typedef struct 
    {
        S3C24X0_REG32	SRCPND;
        S3C24X0_REG32	INTMOD;
        S3C24X0_REG32	INTMSK;
        S3C24X0_REG32	PRIORITY;
        S3C24X0_REG32	INTPND;
        S3C24X0_REG32	INTOFFSET;
        S3C24X0_REG32	SUBSRCPND;
        S3C24X0_REG32	INTSUBMSK;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_INTERRUPT;
    /* DMAS (see manual chapter 8) */
    __packed
		typedef struct 
    {
        S3C24X0_REG32	DISRC;
        S3C24X0_REG32	DISRCC;
        S3C24X0_REG32	DIDST;
        S3C24X0_REG32	DIDSTC;
        S3C24X0_REG32	DCON;
        S3C24X0_REG32	DSTAT;
        S3C24X0_REG32	DCSRC;
        S3C24X0_REG32	DCDST;
        S3C24X0_REG32	DMASKTRIG;
        S3C24X0_REG32	res[7];
    } 
    /*__attribute__((__packed__))*/ S3C24X0_DMA;
    __packed
		typedef struct 
    {
        S3C24X0_DMA	dma[4];
    } 
    /*__attribute__((__packed__))*/ S3C24X0_DMAS;
    /* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */
    /*                          (see S3C2410 manual chapter 7) */
    __packed
		typedef struct 
    {
        S3C24X0_REG32	LOCKTIME;
        S3C24X0_REG32	MPLLCON;
        S3C24X0_REG32	UPLLCON;
        S3C24X0_REG32	CLKCON;
        S3C24X0_REG32	CLKSLOW;
        S3C24X0_REG32	CLKDIVN;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;
    /* LCD CONTROLLER (see manual chapter 15) */
//    __packed
		typedef struct 
    {
        S3C24X0_REG32	LCDCON1;
        S3C24X0_REG32	LCDCON2;
        S3C24X0_REG32	LCDCON3;
        S3C24X0_REG32	LCDCON4;
        S3C24X0_REG32	LCDCON5;
        S3C24X0_REG32	LCDSADDR1;
        S3C24X0_REG32	LCDSADDR2;
        S3C24X0_REG32	LCDSADDR3;
        S3C24X0_REG32	REDLUT;
        S3C24X0_REG32	GREENLUT;
        S3C24X0_REG32	BLUELUT;
        S3C24X0_REG32	res[8];
        S3C24X0_REG32	DITHMODE;
        S3C24X0_REG32	TPAL;
        S3C24X0_REG32	LCDINTPND;
        S3C24X0_REG32	LCDSRCPND;
        S3C24X0_REG32	LCDINTMSK;
        S3C24X0_REG32	LPCSEL;
    } 
    /*__attribute__((__packed__))*/
	S3C24X0_LCD;
    /* NAND FLASH (see S3C2410 manual chapter 6) */
    /*
    typedef struct 
    {
        S3C24X0_REG32	NFCONF;
        S3C24X0_REG32	NFCMD;
        S3C24X0_REG32	NFADDR;
        S3C24X0_REG32	NFDATA;
        S3C24X0_REG32	NFSTAT;
        S3C24X0_REG32	NFECC;
    }
	*/
    /*__attribute__((__packed__))*/
	//S3C2410_NAND;
    /* UART (see manual chapter 11) */
//    __packed
		typedef struct 
    {
        S3C24X0_REG32	ULCON;
        S3C24X0_REG32	UCON;
        S3C24X0_REG32	UFCON;
        S3C24X0_REG32	UMCON;
        S3C24X0_REG32	UTRSTAT;
        S3C24X0_REG32	UERSTAT;
        S3C24X0_REG32	UFSTAT;
        S3C24X0_REG32	UMSTAT;
        #ifdef __BIG_ENDIAN
        S3C24X0_REG8	res1[3];
        S3C24X0_REG8	UTXH;
        S3C24X0_REG8	res2[3];
        S3C24X0_REG8	URXH;
        #else /* Little Endian */
        S3C24X0_REG8	UTXH;
        S3C24X0_REG8	res1[3];
        S3C24X0_REG8	URXH;
        S3C24X0_REG8	res2[3];
        #endif
        S3C24X0_REG32	UBRDIV;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_UART;
    /* PWM TIMER (see manual chapter 10) */
//   __packed
	   typedef struct 
    {
        S3C24X0_REG32	TCNTB;
        S3C24X0_REG32	TCMPB;
        S3C24X0_REG32	TCNTO;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_TIMER;
//    __packed
		typedef struct 
    {
        S3C24X0_REG32	TCFG0;
        S3C24X0_REG32	TCFG1;
        S3C24X0_REG32	TCON;
        S3C24X0_TIMER	ch[4];
        S3C24X0_REG32	TCNTB4;
        S3C24X0_REG32	TCNTO4;
    } 
    /*__attribute__((__packed__))*/ S3C24X0_TIMERS;
    /* USB DEVICE (see manual chapter 13) */
//   __packed
	   typedef struct 
    {
        #ifdef __BIG_ENDIAN
        S3C24X0_REG8	res[3];
        S3C24X0_REG8	EP_FIFO_REG;
        #else /*  little endian */
        S3C24X0_REG8	EP_FIFO_REG;
        S3C24X0_REG8	res[3];
        #endif
    } 
    /*__attribute__((__packed__))*/ S3C24X0_USB_DEV_FIFOS;
//    __packed
		typedef struct 
    {
        #ifdef __BIG_ENDIAN