📄 i830_driver.c
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#endif for(i = 0; i < numColors; i++) { index = indices[i]; r = colors[index].red; g = colors[index].green; b = colors[index].blue; val = (r << 16) | (g << 8) | b; OUTREG(palreg + index * 4, val);#if 1 /* Dual head 8bpp modes seem to squish the primary's cmap - reload */ if (!I830IsPrimary(pScrn) && xf86IsEntityShared(pScrn->entityList[0]) && pScrn->depth == 8) { if (palreg == PALETTE_A) OUTREG(PALETTE_B + index * 4, val8[index]); else OUTREG(PALETTE_A + index * 4, val8[index]); }#endif } break; }}static intI830UseDDC(ScrnInfoPtr pScrn){ xf86MonPtr DDC = (xf86MonPtr)(pScrn->monitor->DDC); struct detailed_monitor_section* detMon; struct monitor_ranges *mon_range = NULL; int i; if (!DDC) return 0; /* Now change the hsync/vrefresh values of the current monitor to * match those of DDC */ for (i = 0; i < 4; i++) { detMon = &DDC->det_mon[i]; if(detMon->type == DS_RANGES) mon_range = &detMon->section.ranges; } if (!mon_range || mon_range->min_h == 0 || mon_range->max_h == 0 || mon_range->min_v == 0 || mon_range->max_v == 0) return 0; /* bad ddc */ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using detected DDC timings\n"); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tHorizSync %d-%d\n", mon_range->min_h, mon_range->max_h); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "\tVertRefresh %d-%d\n", mon_range->min_v, mon_range->max_v);#define DDC_SYNC_TOLERANCE SYNC_TOLERANCE if (pScrn->monitor->nHsync > 0) { for (i = 0; i < pScrn->monitor->nHsync; i++) { if ((1.0 - DDC_SYNC_TOLERANCE) * mon_range->min_h > pScrn->monitor->hsync[i].lo || (1.0 + DDC_SYNC_TOLERANCE) * mon_range->max_h < pScrn->monitor->hsync[i].hi) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "config file hsync range %g-%gkHz not within DDC " "hsync range %d-%dkHz\n", pScrn->monitor->hsync[i].lo, pScrn->monitor->hsync[i].hi, mon_range->min_h, mon_range->max_h); } pScrn->monitor->hsync[i].lo = mon_range->min_h; pScrn->monitor->hsync[i].hi = mon_range->max_h; } } if (pScrn->monitor->nVrefresh > 0) { for (i=0; i<pScrn->monitor->nVrefresh; i++) { if ((1.0 - DDC_SYNC_TOLERANCE) * mon_range->min_v > pScrn->monitor->vrefresh[i].lo || (1.0 + DDC_SYNC_TOLERANCE) * mon_range->max_v < pScrn->monitor->vrefresh[i].hi) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "config file vrefresh range %g-%gHz not within DDC " "vrefresh range %d-%dHz\n", pScrn->monitor->vrefresh[i].lo, pScrn->monitor->vrefresh[i].hi, mon_range->min_v, mon_range->max_v); } pScrn->monitor->vrefresh[i].lo = mon_range->min_v; pScrn->monitor->vrefresh[i].hi = mon_range->max_v; } } return mon_range->max_clock;}static voidPreInitCleanup(ScrnInfoPtr pScrn){ I830Ptr pI830 = I830PTR(pScrn); if (I830IsPrimary(pScrn)) pI830->entityPrivate->pScrn_1 = NULL; if (I830IsPrimary(pScrn) && pI830->LpRing) { xfree(pI830->LpRing); pI830->LpRing = NULL; } if (I830IsPrimary(pScrn) && pI830->CursorMem) { xfree(pI830->CursorMem); pI830->CursorMem = NULL; } if (I830IsPrimary(pScrn) && pI830->CursorMemARGB) { xfree(pI830->CursorMemARGB); pI830->CursorMemARGB = NULL; } if (I830IsPrimary(pScrn) && pI830->OverlayMem) { xfree(pI830->OverlayMem); pI830->OverlayMem = NULL; } if (I830IsPrimary(pScrn) && pI830->overlayOn) { xfree(pI830->overlayOn); pI830->overlayOn = NULL; } if (I830IsPrimary(pScrn) && pI830->used3D) { xfree(pI830->used3D); pI830->used3D = NULL; } if (!I830IsPrimary(pScrn) && pI830->entityPrivate) pI830->entityPrivate->pScrn_2 = NULL; RestoreBIOSMemSize(pScrn); if (pI830->swfSaved) { OUTREG(SWF0, pI830->saveSWF0); OUTREG(SWF4, pI830->saveSWF4); } if (pI830->MMIOBase) I830UnmapMMIO(pScrn); I830BIOSFreeRec(pScrn);}BoolI830IsPrimary(ScrnInfoPtr pScrn){ I830Ptr pI830 = I830PTR(pScrn); if (xf86IsEntityShared(pScrn->entityList[0])) { if (pI830->init == 0) return TRUE; else return FALSE; } return TRUE;}static BoolI830BIOSPreInit(ScrnInfoPtr pScrn, int flags){ vgaHWPtr hwp; I830Ptr pI830; MessageType from; rgb defaultWeight = { 0, 0, 0 }; EntityInfoPtr pEnt; I830EntPtr pI830Ent = NULL; int mem, memsize; int flags24; int defmon = 0; int i, n; int DDCclock = 0; char *s; DisplayModePtr p, pMon; pointer pDDCModule = NULL, pVBEModule = NULL; Bool enable; const char *chipname; unsigned int ver; char v[5]; if (pScrn->numEntities != 1) return FALSE; if (!xf86LoadSubModule(pScrn, "intel_acpi")) return FALSE; /* try to load the video kernel module now */ xf86LoadKernelModule("video"); if (xf86LoaderCheckSymbol("I830ACPIOpen")) { void (*acpiOpen)(void) = NULL; acpiOpen = LoaderSymbol("I830ACPIOpen"); if (acpiOpen) { ErrorF("Opening ACPI\n"); (*acpiOpen)(); } } /* Load int10 module */ if (!xf86LoadSubModule(pScrn, "int10")) return FALSE; xf86LoaderReqSymLists(I810int10Symbols, NULL); /* Load vbe module */ if (!(pVBEModule = xf86LoadSubModule(pScrn, "vbe"))) return FALSE; xf86LoaderReqSymLists(I810vbeSymbols, NULL); pEnt = xf86GetEntityInfo(pScrn->entityList[0]); if (flags & PROBE_DETECT) { I830BIOSProbeDDC(pScrn, pEnt->index); return TRUE; } /* The vgahw module should be loaded here when needed */ if (!xf86LoadSubModule(pScrn, "vgahw")) return FALSE; xf86LoaderReqSymLists(I810vgahwSymbols, NULL); /* Allocate a vgaHWRec */ if (!vgaHWGetHWRec(pScrn)) return FALSE; /* Allocate driverPrivate */ if (!I830BIOSGetRec(pScrn)) return FALSE; pI830 = I830PTR(pScrn); pI830->SaveGeneration = -1; pI830->pEnt = pEnt; pI830->displayWidth = 640; /* default it */ if (pI830->pEnt->location.type != BUS_PCI) return FALSE; pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index); pI830->PciTag = pciTag(pI830->PciInfo->bus, pI830->PciInfo->device, pI830->PciInfo->func); /* Allocate an entity private if necessary */ if (xf86IsEntityShared(pScrn->entityList[0])) { pI830Ent = xf86GetEntityPrivate(pScrn->entityList[0], I830EntityIndex)->ptr; pI830->entityPrivate = pI830Ent; } else pI830->entityPrivate = NULL; if (xf86RegisterResources(pI830->pEnt->index, 0, ResNone)) { PreInitCleanup(pScrn); return FALSE; } pScrn->racMemFlags = RAC_FB | RAC_COLORMAP; pScrn->monitor = pScrn->confScreen->monitor; pScrn->progClock = TRUE; pScrn->rgbBits = 8; flags24 = Support32bppFb | PreferConvert24to32 | SupportConvert24to32; if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24)) return FALSE; switch (pScrn->depth) { case 8: case 15: case 16: case 24: break; default: xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given depth (%d) is not supported by I830 driver\n", pScrn->depth); return FALSE; } xf86PrintDepthBpp(pScrn); if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight)) return FALSE; if (!xf86SetDefaultVisual(pScrn, -1)) return FALSE; hwp = VGAHWPTR(pScrn); pI830->cpp = pScrn->bitsPerPixel / 8; pI830->preinit = TRUE; /* Process the options */ xf86CollectOptions(pScrn, NULL); if (!(pI830->Options = xalloc(sizeof(I830BIOSOptions)))) return FALSE; memcpy(pI830->Options, I830BIOSOptions, sizeof(I830BIOSOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI830->Options); /* We have to use PIO to probe, because we haven't mapped yet. */ I830SetPIOAccess(pI830); /* Initialize VBE record */ if ((pI830->pVbe = VBEInit(NULL, pI830->pEnt->index)) == NULL) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "VBE initialization failed.\n"); return FALSE; } switch (pI830->PciInfo->chipType) { case PCI_CHIP_I830_M: chipname = "830M"; break; case PCI_CHIP_845_G: chipname = "845G"; break; case PCI_CHIP_I855_GM: /* Check capid register to find the chipset variant */ pI830->variant = (pciReadLong(pI830->PciTag, I85X_CAPID) >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK; switch (pI830->variant) { case I855_GM: chipname = "855GM"; break; case I855_GME: chipname = "855GME"; break; case I852_GM: chipname = "852GM"; break; case I852_GME: chipname = "852GME"; break; default: xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Unknown 852GM/855GM variant: 0x%x)\n", pI830->variant); chipname = "852GM/855GM (unknown variant)"; break; } break; case PCI_CHIP_I865_G: chipname = "865G"; break; case PCI_CHIP_I915_G: chipname = "915G"; break; case PCI_CHIP_E7221_G: chipname = "E7221 (i915)"; break; case PCI_CHIP_I915_GM: chipname = "915GM"; break; case PCI_CHIP_I945_G: chipname = "945G"; break; case PCI_CHIP_I945_GM: chipname = "945GM"; break; default: chipname = "unknown chipset"; break; } xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Integrated Graphics Chipset: Intel(R) %s\n", chipname); pI830->vbeInfo = VBEGetVBEInfo(pI830->pVbe); /* Set the Chipset and ChipRev, allowing config file entries to override. */ if (pI830->pEnt->device->chipset && *pI830->pEnt->device->chipset) { pScrn->chipset = pI830->pEnt->device->chipset; from = X_CONFIG; } else if (pI830->pEnt->device->chipID >= 0) { pScrn->chipset = (char *)xf86TokenToString(I830BIOSChipsets, pI830->pEnt->device->chipID); from = X_CONFIG; xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", pI830->pEnt->device->chipID); } else { from = X_PROBED; pScrn->chipset = (char *)xf86TokenToString(I830BIOSChipsets, pI830->PciInfo->chipType); } if (pI830->pEnt->device->chipRev >= 0) { xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", pI830->pEnt->device->chipRev); } xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", (pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i8xx"); if (pI830->pEnt->device->MemBase != 0) { pI830->LinearAddr = pI830->pEnt->device->MemBase; from = X_CONFIG; } else { if (IS_I9XX(pI830)) { pI830->LinearAddr = pI830->PciInfo->memBase[2] & 0xFF000000; from = X_PROBED; } else if (pI830->PciInfo->memBase[1] != 0) { /* XXX Check mask. */ pI830->LinearAddr = pI830->PciInfo->memBase[0] & 0xFF000000; from = X_PROBED; } else { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid FB address in PCI config space\n"); PreInitCleanup(pScrn); return FALSE; } } xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", (unsigned long)pI830->LinearAddr); if (pI830->pEnt->device->IOBase != 0) { pI830->MMIOAddr = pI830->pEnt->device->IOBase; from = X_CONFIG; } else { if (IS_I9XX(pI830)) { pI830->MMIOAddr = pI830->PciInfo->memBase[0] & 0xFFF80000; from = X_PROBED; } else if (pI830->PciInfo->memBase[1]) { pI830->MMIOAddr = pI830->PciInfo->memBase[1] & 0xFFF80000; from = X_PROBED; } else { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid MMIO address in PCI config space\n"); PreInitCleanup(pScrn); return FALSE; } } xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n", (unsigned long)pI830->MMIOAddr); /* Some of the probing needs MMIO access, so map it here. */ I830MapMMIO(pScrn);#if 1 pI830->saveSWF0 = INREG(SWF0); pI830->saveSWF4 = INREG(SWF4); pI830->swfSaved = TRUE; /* Set "extended desktop" */ OUTREG(SWF0, pI830->saveSWF0 | (1 << 21)); /* Set "driver loaded", "OS unknown", "APM 1.2" */ OUTREG(SWF4, (pI830->saveSWF4 & ~((3 << 19) | (7 << 16))) | (1 << 23) | (2 << 16));#endif if (IS_I830(pI830) || IS_845G(pI830)) { PCITAG bridge; CARD16 gmch_ctrl; bridge = pciTag(0, 0, 0); /* This is always the host bridge */ gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL); if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) { pI830->FbMapSize = 0x8000000; } else { pI830->FbMapSize = 0x4000000; /* 64MB - has this been tested ?? */ } } else { if (IS_I9XX(pI830)) { if (pI830->PciInfo->memBase[2] & 0x08000000) pI830->FbMapSize = 0x8000000; /* 128MB aperture */ else pI830->FbMapSize = 0x10000000; /* 256MB aperture */ if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G) pI830->FbMapSize = 0x8000000; /* 128MB aperture */ } else /* 128MB aperture for later chips */ pI830->FbMapSize = 0x8000000; } if (xf86IsEntityShared(pScrn->entityList[0])) { if (xf86IsPrimInitDone(pScrn->entityList[0])) { pI830->init = 1; if (!pI830Ent->pScrn_1) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to setup second head due to primary head failure.\n"); return FALSE; } } else { xf86Set
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