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Node:<a name="SH%20Options">SH Options</a>,

Next:<a rel="next" accesskey="n" href="System-V-Options.html#System%20V%20Options">System V Options</a>,

Previous:<a rel="previous" accesskey="p" href="H8-300-Options.html#H8%2f300%20Options">H8/300 Options</a>,

Up:<a rel="up" accesskey="u" href="Submodel-Options.html#Submodel%20Options">Submodel Options</a>

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<h4 class="subsection">SH Options</h4>



   <p>These <code>-m</code> options are defined for the SH implementations:



     <dl>

<dt><code>-m1</code>

     <dd>Generate code for the SH1.



     <br><dt><code>-m2</code>

     <dd>Generate code for the SH2.



     <br><dt><code>-m3</code>

     <dd>Generate code for the SH3.



     <br><dt><code>-m3e</code>

     <dd>Generate code for the SH3e.



     <br><dt><code>-m4-nofpu</code>

     <dd>Generate code for the SH4 without a floating-point unit.



     <br><dt><code>-m4-single-only</code>

     <dd>Generate code for the SH4 with a floating-point unit that only

supports single-precision arithmetic.



     <br><dt><code>-m4-single</code>

     <dd>Generate code for the SH4 assuming the floating-point unit is in

single-precision mode by default.



     <br><dt><code>-m4</code>

     <dd>Generate code for the SH4.



     <br><dt><code>-mb</code>

     <dd>Compile code for the processor in big endian mode.



     <br><dt><code>-ml</code>

     <dd>Compile code for the processor in little endian mode.



     <br><dt><code>-mdalign</code>

     <dd>Align doubles at 64-bit boundaries.  Note that this changes the calling

conventions, and thus some functions from the standard C library will

not work unless you recompile it first with <code>-mdalign</code>.



     <br><dt><code>-mrelax</code>

     <dd>Shorten some address references at link time, when possible; uses the

linker option <code>-relax</code>.



     <br><dt><code>-mbigtable</code>

     <dd>Use 32-bit offsets in <code>switch</code> tables.  The default is to use

16-bit offsets.



     <br><dt><code>-mfmovd</code>

     <dd>Enable the use of the instruction <code>fmovd</code>.



     <br><dt><code>-mhitachi</code>

     <dd>Comply with the calling conventions defined by Hitachi.



     <br><dt><code>-mnomacsave</code>

     <dd>Mark the <code>MAC</code> register as call-clobbered, even if

<code>-mhitachi</code> is given.



     <br><dt><code>-mieee</code>

     <dd>Increase IEEE-compliance of floating-point code.



     <br><dt><code>-misize</code>

     <dd>Dump instruction size and location in the assembly code.



     <br><dt><code>-mpadstruct</code>

     <dd>This option is deprecated.  It pads structures to multiple of 4 bytes,

which is incompatible with the SH ABI.



     <br><dt><code>-mspace</code>

     <dd>Optimize for space instead of speed.  Implied by <code>-Os</code>.



     <br><dt><code>-mprefergot</code>

     <dd>When generating position-independent code, emit function calls using

the Global Offset Table instead of the Procedure Linkage Table.



     <br><dt><code>-musermode</code>

     <dd>Generate a library function call to invalidate instruction cache

entries, after fixing up a trampoline.  This library function call

doesn't assume it can write to the whole memory address space.  This

is the default when the target is <code>sh-*-linux*</code>. 

</dl>



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