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Node:<a name="RS%2f6000%20and%20PowerPC%20Options">RS/6000 and PowerPC Options</a>,

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<h4 class="subsection">IBM RS/6000 and PowerPC Options</h4>



   <p>These <code>-m</code> options are defined for the IBM RS/6000 and PowerPC:

     <dl>

<dt><code>-mpower</code>

     <dd><dt><code>-mno-power</code>

     <dd><dt><code>-mpower2</code>

     <dd><dt><code>-mno-power2</code>

     <dd><dt><code>-mpowerpc</code>

     <dd><dt><code>-mno-powerpc</code>

     <dd><dt><code>-mpowerpc-gpopt</code>

     <dd><dt><code>-mno-powerpc-gpopt</code>

     <dd><dt><code>-mpowerpc-gfxopt</code>

     <dd><dt><code>-mno-powerpc-gfxopt</code>

     <dd><dt><code>-mpowerpc64</code>

     <dd><dt><code>-mno-powerpc64</code>

     <dd>GCC supports two related instruction set architectures for the

RS/6000 and PowerPC.  The <dfn>POWER</dfn> instruction set are those

instructions supported by the <code>rios</code> chip set used in the original

RS/6000 systems and the <dfn>PowerPC</dfn> instruction set is the

architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and

the IBM 4xx microprocessors.



     <p>Neither architecture is a subset of the other.  However there is a

large common subset of instructions supported by both.  An MQ

register is included in processors supporting the POWER architecture.



     <p>You use these options to specify which instructions are available on the

processor you are using.  The default value of these options is

determined when configuring GCC.  Specifying the

<code>-mcpu=</code><var>cpu_type</var><code></code> overrides the specification of these

options.  We recommend you use the <code>-mcpu=</code><var>cpu_type</var><code></code> option

rather than the options listed above.



     <p>The <code>-mpower</code> option allows GCC to generate instructions that

are found only in the POWER architecture and to use the MQ register. 

Specifying <code>-mpower2</code> implies <code>-power</code> and also allows GCC

to generate instructions that are present in the POWER2 architecture but

not the original POWER architecture.



     <p>The <code>-mpowerpc</code> option allows GCC to generate instructions that

are found only in the 32-bit subset of the PowerPC architecture. 

Specifying <code>-mpowerpc-gpopt</code> implies <code>-mpowerpc</code> and also allows

GCC to use the optional PowerPC architecture instructions in the

General Purpose group, including floating-point square root.  Specifying

<code>-mpowerpc-gfxopt</code> implies <code>-mpowerpc</code> and also allows GCC to

use the optional PowerPC architecture instructions in the Graphics

group, including floating-point select.



     <p>The <code>-mpowerpc64</code> option allows GCC to generate the additional

64-bit instructions that are found in the full PowerPC64 architecture

and to treat GPRs as 64-bit, doubleword quantities.  GCC defaults to

<code>-mno-powerpc64</code>.



     <p>If you specify both <code>-mno-power</code> and <code>-mno-powerpc</code>, GCC

will use only the instructions in the common subset of both

architectures plus some special AIX common-mode calls, and will not use

the MQ register.  Specifying both <code>-mpower</code> and <code>-mpowerpc</code>

permits GCC to use any instruction from either architecture and to

allow use of the MQ register; specify this for the Motorola MPC601.



     <br><dt><code>-mnew-mnemonics</code>

     <dd><dt><code>-mold-mnemonics</code>

     <dd>Select which mnemonics to use in the generated assembler code.  With

<code>-mnew-mnemonics</code>, GCC uses the assembler mnemonics defined for

the PowerPC architecture.  With <code>-mold-mnemonics</code> it uses the

assembler mnemonics defined for the POWER architecture.  Instructions

defined in only one architecture have only one mnemonic; GCC uses that

mnemonic irrespective of which of these options is specified.



     <p>GCC defaults to the mnemonics appropriate for the architecture in

use.  Specifying <code>-mcpu=</code><var>cpu_type</var><code></code> sometimes overrides the

value of these option.  Unless you are building a cross-compiler, you

should normally not specify either <code>-mnew-mnemonics</code> or

<code>-mold-mnemonics</code>, but should instead accept the default.



     <br><dt><code>-mcpu=</code><var>cpu_type</var><code></code>

     <dd>Set architecture type, register usage, choice of mnemonics, and

instruction scheduling parameters for machine type <var>cpu_type</var>. 

Supported values for <var>cpu_type</var> are <code>rios</code>, <code>rios1</code>,

<code>rsc</code>, <code>rios2</code>, <code>rs64a</code>, <code>601</code>, <code>602</code>,

<code>603</code>, <code>603e</code>, <code>604</code>, <code>604e</code>, <code>620</code>,

<code>630</code>, <code>740</code>, <code>7400</code>, <code>7450</code>, <code>750</code>,

<code>power</code>, <code>power2</code>, <code>powerpc</code>, <code>403</code>, <code>505</code>,

<code>801</code>, <code>821</code>, <code>823</code>, and <code>860</code> and <code>common</code>.



     <p><code>-mcpu=common</code> selects a completely generic processor.  Code

generated under this option will run on any POWER or PowerPC processor. 

GCC will use only the instructions in the common subset of both

architectures, and will not use the MQ register.  GCC assumes a generic

processor model for scheduling purposes.



     <p><code>-mcpu=power</code>, <code>-mcpu=power2</code>, <code>-mcpu=powerpc</code>, and

<code>-mcpu=powerpc64</code> specify generic POWER, POWER2, pure 32-bit

PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine

types, with an appropriate, generic processor model assumed for

scheduling purposes.



     <p>The other options specify a specific processor.  Code generated under

those options will run best on that processor, and may not run at all on

others.



     <p>The <code>-mcpu</code> options automatically enable or disable other

<code>-m</code> options as follows:



          <dl>

<dt><code>common</code>

          <dd><code>-mno-power</code>, <code>-mno-powerpc</code>



          <br><dt><code>power</code>

          <dd><dt><code>power2</code>

          <dd><dt><code>rios1</code>

          <dd><dt><code>rios2</code>

          <dd><dt><code>rsc</code>

          <dd><code>-mpower</code>, <code>-mno-powerpc</code>, <code>-mno-new-mnemonics</code>



          <br><dt><code>powerpc</code>

          <dd><dt><code>rs64a</code>

          <dd><dt><code>602</code>

          <dd><dt><code>603</code>

          <dd><dt><code>603e</code>

          <dd><dt><code>604</code>

          <dd><dt><code>620</code>

          <dd><dt><code>630</code>

          <dd><dt><code>740</code>

          <dd><dt><code>7400</code>

          <dd><dt><code>7450</code>

          <dd><dt><code>750</code>

          <dd><dt><code>505</code>

          <dd><code>-mno-power</code>, <code>-mpowerpc</code>, <code>-mnew-mnemonics</code>



          <br><dt><code>601</code>

          <dd><code>-mpower</code>, <code>-mpowerpc</code>, <code>-mnew-mnemonics</code>



          <br><dt><code>403</code>

          <dd><dt><code>821</code>

          <dd><dt><code>860</code>

          <dd><code>-mno-power</code>, <code>-mpowerpc</code>, <code>-mnew-mnemonics</code>, <code>-msoft-float</code>

</dl>



     <br><dt><code>-mtune=</code><var>cpu_type</var><code></code>

     <dd>Set the instruction scheduling parameters for machine type

<var>cpu_type</var>, but do not set the architecture type, register usage, or

choice of mnemonics, as <code>-mcpu=</code><var>cpu_type</var><code></code> would.  The same

values for <var>cpu_type</var> are used for <code>-mtune</code> as for

<code>-mcpu</code>.  If both are specified, the code generated will use the

architecture, registers, and mnemonics set by <code>-mcpu</code>, but the

scheduling parameters set by <code>-mtune</code>.



     <br><dt><code>-maltivec</code>

     <dd><dt><code>-mno-altivec</code>

     <dd>These switches enable or disable the use of built-in functions that

allow access to the AltiVec instruction set.  You may also need to set

<code>-mabi=altivec</code> to adjust the current ABI with AltiVec ABI

enhancements.



     <br><dt><code>-mabi=spe</code>

     <dd>Extend the current ABI with SPE ABI extensions.  This does not change

the default ABI, instead it adds the SPE ABI extensions to the current

ABI.



     <br><dt><code>-mabi=no-spe</code>

     <dd>Disable Booke SPE ABI extensions for the current ABI.



     <br><dt><code>-misel=</code><var>yes/no</var><code></code>

     <dd><dt><code>-misel</code>

     <dd>This switch enables or disables the generation of ISEL instructions.



     <br><dt><code>-mfull-toc</code>

     <dd><dt><code>-mno-fp-in-toc</code>

     <dd><dt><code>-mno-sum-in-toc</code>

     <dd><dt><code>-mminimal-toc</code>

     <dd>Modify generation of the TOC (Table Of Contents), which is created for

every executable file.  The <code>-mfull-toc</code> option is selected by

default.  In that case, GCC will allocate at least one TOC entry for

each unique non-automatic variable reference in your program.  GCC

will also place floating-point constants in the TOC.  However, only

16,384 entries are available in the TOC.



     <p>If you receive a linker error message that saying you have overflowed

the available TOC space, you can reduce the amount of TOC space used

with the <code>-mno-fp-in-toc</code> and <code>-mno-sum-in-toc</code> options. 

<code>-mno-fp-in-toc</code> prevents GCC from putting floating-point

constants in the TOC and <code>-mno-sum-in-toc</code> forces GCC to

generate code to calculate the sum of an address and a constant at

run-time instead of putting that sum into the TOC.  You may specify one

or both of these options.  Each causes GCC to produce very slightly

slower and larger code at the expense of conserving TOC space.



     <p>If you still run out of space in the TOC even when you specify both of

these options, specify <code>-mminimal-toc</code> instead.  This option causes

GCC to make only one TOC entry for every file.  When you specify this

option, GCC will produce code that is slower and larger but which

uses extremely little TOC space.  You may wish to use this option

only on files that contain less frequently executed code.



     <br><dt><code>-maix64</code>

     <dd><dt><code>-maix32</code>

     <dd>Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit

<code>long</code> type, and the infrastructure needed to support them. 

Specifying <code>-maix64</code> implies <code>-mpowerpc64</code> and

<code>-mpowerpc</code>, while <code>-maix32</code> disables the 64-bit ABI and

implies <code>-mno-powerpc64</code>.  GCC defaults to <code>-maix32</code>.



     <br><dt><code>-mxl-call</code>

     <dd><dt><code>-mno-xl-call</code>

     <dd>On AIX, pass floating-point arguments to prototyped functions beyond the

register save area (RSA) on the stack in addition to argument FPRs.  The

AIX calling convention was extended but not initially documented to

handle an obscure K&amp;R C case of calling a function that takes the

address of its arguments with fewer arguments than declared.  AIX XL

compilers access floating point arguments which do not fit in the

RSA from the stack when a subroutine is compiled without

optimization.  Because always storing floating-point arguments on the

stack is inefficient and rarely needed, this option is not enabled by

default and only is necessary when calling subroutines compiled by AIX

XL compilers without optimization.



     <br><dt><code>-mpe</code>

     <dd>Support <dfn>IBM RS/6000 SP</dfn> <dfn>Parallel Environment</dfn> (PE).  Link an

application written to use message passing with special startup code to

enable the application to run.  The system must have PE installed in the

standard location (<code>/usr/lpp/ppe.poe/</code>), or the <code>specs</code> file

must be overridden with the <code>-specs=</code> option to specify the

appropriate directory location.  The Parallel Environment does not

support threads, so the <code>-mpe</code> option and the <code>-pthread</code>

option are incompatible.



     <br><dt><code>-msoft-float</code>

     <dd><dt><code>-mhard-float</code>

     <dd>Generate code that does not use (uses) the floating-point register set. 

Software floating point emulation is provided if you use the
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