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<h4 class="subsection">MIPS Options</h4>
<p>These <code>-m</code> options are defined for the MIPS family of computers:
<dl>
<br><dt><code>-march=</code><var>arch</var><code></code>
<dd>Generate code that will run on <var>arch</var>, which can be the name of a
generic MIPS ISA, or the name of a particular processor. The ISA names
are: <code>mips1</code>, <code>mips2</code>, <code>mips3</code>, <code>mips4</code>, <code>mips32</code>
and <code>mips64</code>. The processor names are: <code>r2000</code>,
<code>r3000</code>, <code>r3900</code>, <code>r4000</code>, <code>vr4100</code>, <code>vr4300</code>,
<code>r4400</code>, <code>r4600</code>, <code>r4650</code>, <code>vr5000</code>, <code>r6000</code>,
<code>r8000</code>, <code>4kc</code>, <code>4kp</code>, <code>5kc</code>, <code>20kc</code>,
<code>orion</code>, and <code>sb1</code>. The special value <code>from-abi</code> selects the
most compatible architecture for the selected ABI (that is,
<code>mips1</code> for 32-bit ABIs and <code>mips3</code> for 64-bit ABIs).
<p>In processor names, a final <code>000</code> can be abbreviated as <code>k</code>
(for example, <code>-march=r2k</code>). Prefixes are optional, and
<code>vr</code> may be written <code>r</code>.
<p>GCC defines two macros based on the value of this option. The first
is <code>_MIPS_ARCH</code>, which gives the name of target architecture, as
a string. The second has the form <code>_MIPS_ARCH_</code><var>foo</var><code></code>,
where <var>foo</var> is the capitalized value of <code>_MIPS_ARCH</code>.
For example, <code>-march=r2000</code> will set <code>_MIPS_ARCH</code>
to <code>"r2000"</code> and define the macro <code>_MIPS_ARCH_R2000</code>.
<p>Note that the <code>_MIPS_ARCH</code> macro uses the processor names given
above. In other words, it will have the full prefix and will not
abbreviate <code>000</code> as <code>k</code>. In the case of <code>from-abi</code>,
the macro names the resolved architecture (either <code>"mips1"</code> or
<code>"mips3"</code>). It names the default architecture when no
<code>-march</code> option is given.
<br><dt><code>-mtune=</code><var>arch</var><code></code>
<dd>Optimize for <var>arch</var>. Among other things, this option controls
the way instructions are scheduled, and the perceived cost of arithmetic
operations. The list of <var>arch</var> values is the same as for
<code>-march</code>.
<p>When this option is not used, GCC will optimize for the processor
specified by <code>-march</code>. By using <code>-march</code> and
<code>-mtune</code> together, it is possible to generate code that will
run on a family of processors, but optimize the code for one
particular member of that family.
<p><code>-mtune</code> defines the macros <code>_MIPS_TUNE</code> and
<code>_MIPS_TUNE_</code><var>foo</var><code></code>, which work in the same way as the
<code>-march</code> ones described above.
<br><dt><code>-mips1</code>
<dd>Equivalent to <code>-march=mips1</code>.
<br><dt><code>-mips2</code>
<dd>Equivalent to <code>-march=mips2</code>.
<br><dt><code>-mips3</code>
<dd>Equivalent to <code>-march=mips3</code>.
<br><dt><code>-mips4</code>
<dd>Equivalent to <code>-march=mips4</code>.
<br><dt><code>-mips32</code>
<dd>Equivalent to <code>-march=mips32</code>.
<br><dt><code>-mips64</code>
<dd>Equivalent to <code>-march=mips64</code>.
<br><dt><code>-mfused-madd</code>
<dd><dt><code>-mno-fused-madd</code>
<dd>Generate code that uses (does not use) the floating point multiply and
accumulate instructions, when they are available. These instructions
are generated by default if they are available, but this may be
undesirable if the extra precision causes problems or on certain chips
in the mode where denormals are rounded to zero where denormals
generated by multiply and accumulate instructions cause exceptions
anyway.
<br><dt><code>-mfp32</code>
<dd>Assume that floating point registers are 32 bits wide.
<br><dt><code>-mfp64</code>
<dd>Assume that floating point registers are 64 bits wide.
<br><dt><code>-mgp32</code>
<dd>Assume that general purpose registers are 32 bits wide.
<br><dt><code>-mgp64</code>
<dd>Assume that general purpose registers are 64 bits wide.
<br><dt><code>-mint64</code>
<dd>Force int and long types to be 64 bits wide. See <code>-mlong32</code> for an
explanation of the default, and the width of pointers.
<br><dt><code>-mlong64</code>
<dd>Force long types to be 64 bits wide. See <code>-mlong32</code> for an
explanation of the default, and the width of pointers.
<br><dt><code>-mlong32</code>
<dd>Force long, int, and pointer types to be 32 bits wide.
<p>The default size of ints, longs and pointers depends on the ABI. All
the supported ABIs use 32-bit ints. The n64 ABI uses 64-bit longs, as
does the 64-bit Cygnus EABI; the others use 32-bit longs. Pointers
are the same size as longs, or the same size as integer registers,
whichever is smaller.
<br><dt><code>-mabi=32</code>
<dd><dt><code>-mabi=o64</code>
<dd><dt><code>-mabi=n32</code>
<dd><dt><code>-mabi=64</code>
<dd><dt><code>-mabi=eabi</code>
<dd><dt><code>-mabi=meabi</code>
<dd>Generate code for the given ABI.
<p>Note that there are two embedded ABIs: <code>-mabi=eabi</code>
selects the one defined by Cygnus while <code>-meabi=meabi</code>
selects the one defined by MIPS. Both these ABIs have
32-bit and 64-bit variants. Normally, GCC will generate
64-bit code when you select a 64-bit architecture, but you
can use <code>-mgp32</code> to get 32-bit code instead.
<br><dt><code>-mmips-as</code>
<dd>Generate code for the MIPS assembler, and invoke <code>mips-tfile</code> to
add normal debug information. This is the default for all
platforms except for the OSF/1 reference platform, using the OSF/rose
object format. If the either of the <code>-gstabs</code> or <code>-gstabs+</code>
switches are used, the <code>mips-tfile</code> program will encapsulate the
stabs within MIPS ECOFF.
<br><dt><code>-mgas</code>
<dd>Generate code for the GNU assembler. This is the default on the OSF/1
reference platform, using the OSF/rose object format. Also, this is
the default if the configure option <code>--with-gnu-as</code> is used.
<br><dt><code>-msplit-addresses</code>
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