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Node:<a name="Intel%20960%20Options">Intel 960 Options</a>,

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<h4 class="subsection">Intel 960 Options</h4>



   <p>These <code>-m</code> options are defined for the Intel 960 implementations:



     <dl>

<dt><code>-m</code><var>cpu-type</var><code></code>

     <dd>Assume the defaults for the machine type <var>cpu-type</var> for some of

the other options, including instruction scheduling, floating point

support, and addressing modes.  The choices for <var>cpu-type</var> are

<code>ka</code>, <code>kb</code>, <code>mc</code>, <code>ca</code>, <code>cf</code>,

<code>sa</code>, and <code>sb</code>. 

The default is

<code>kb</code>.



     <br><dt><code>-mnumerics</code>

     <dd><dt><code>-msoft-float</code>

     <dd>The <code>-mnumerics</code> option indicates that the processor does support

floating-point instructions.  The <code>-msoft-float</code> option indicates

that floating-point support should not be assumed.



     <br><dt><code>-mleaf-procedures</code>

     <dd><dt><code>-mno-leaf-procedures</code>

     <dd>Do (or do not) attempt to alter leaf procedures to be callable with the

<code>bal</code> instruction as well as <code>call</code>.  This will result in more

efficient code for explicit calls when the <code>bal</code> instruction can be

substituted by the assembler or linker, but less efficient code in other

cases, such as calls via function pointers, or using a linker that doesn't

support this optimization.



     <br><dt><code>-mtail-call</code>

     <dd><dt><code>-mno-tail-call</code>

     <dd>Do (or do not) make additional attempts (beyond those of the

machine-independent portions of the compiler) to optimize tail-recursive

calls into branches.  You may not want to do this because the detection of

cases where this is not valid is not totally complete.  The default is

<code>-mno-tail-call</code>.



     <br><dt><code>-mcomplex-addr</code>

     <dd><dt><code>-mno-complex-addr</code>

     <dd>Assume (or do not assume) that the use of a complex addressing mode is a

win on this implementation of the i960.  Complex addressing modes may not

be worthwhile on the K-series, but they definitely are on the C-series. 

The default is currently <code>-mcomplex-addr</code> for all processors except

the CB and CC.



     <br><dt><code>-mcode-align</code>

     <dd><dt><code>-mno-code-align</code>

     <dd>Align code to 8-byte boundaries for faster fetching (or don't bother). 

Currently turned on by default for C-series implementations only.



     <br><dt><code>-mic-compat</code>

     <dd><dt><code>-mic2.0-compat</code>

     <dd><dt><code>-mic3.0-compat</code>

     <dd>Enable compatibility with iC960 v2.0 or v3.0.



     <br><dt><code>-masm-compat</code>

     <dd><dt><code>-mintel-asm</code>

     <dd>Enable compatibility with the iC960 assembler.



     <br><dt><code>-mstrict-align</code>

     <dd><dt><code>-mno-strict-align</code>

     <dd>Do not permit (do permit) unaligned accesses.



     <br><dt><code>-mold-align</code>

     <dd>Enable structure-alignment compatibility with Intel's gcc release version

1.3 (based on gcc 1.37).  This option implies <code>-mstrict-align</code>.



     <br><dt><code>-mlong-double-64</code>

     <dd>Implement type <code>long double</code> as 64-bit floating point numbers. 

Without the option <code>long double</code> is implemented by 80-bit

floating point numbers.  The only reason we have it because there is

no 128-bit <code>long double</code> support in <code>fp-bit.c</code> yet.  So it

is only useful for people using soft-float targets.  Otherwise, we

should recommend against use of it.



   </dl>



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