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Node:<a name="PDP-11-Options">PDP-11-Options</a>,

Next:<a rel="next" accesskey="n" href="PDP-11-Pseudos.html#PDP-11-Pseudos">PDP-11-Pseudos</a>,

Up:<a rel="up" accesskey="u" href="PDP-11-Dependent.html#PDP-11-Dependent">PDP-11-Dependent</a>

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<h4 class="section">Options</h4>



   <p>The PDP-11 version of <code>as</code> has a rich set of machine

dependent options.



<h5 class="subsection">Code Generation Options</h5>



     <dl>

<dt><code>-mpic | -mno-pic</code>

     <dd>Generate position-independent (or position-dependent) code.



     <p>The default is to generate position-independent code. 

</dl>



<h5 class="subsection">Instruction Set Extention Options</h5>



   <p>These options enables or disables the use of extensions over the base

line instruction set as introduced by the first PDP-11 CPU: the KA11. 

Most options come in two variants: a <code>-m</code><var>extension</var> that

enables <var>extension</var>, and a <code>-mno-</code><var>extension</var> that disables

<var>extension</var>.



   <p>The default is to enable all extensions.



     <dl>

<dt><code>-mall | -mall-extensions</code>

     <dd>Enable all instruction set extensions.



     <br><dt><code>-mno-extensions</code>

     <dd>Disable all instruction set extensions.



     <br><dt><code>-mcis | -mno-cis</code>

     <dd>Enable (or disable) the use of the commersial instruction set, which

consists of these instructions: <code>ADDNI</code>, <code>ADDN</code>, <code>ADDPI</code>,

<code>ADDP</code>, <code>ASHNI</code>, <code>ASHN</code>, <code>ASHPI</code>, <code>ASHP</code>,

<code>CMPCI</code>, <code>CMPC</code>, <code>CMPNI</code>, <code>CMPN</code>, <code>CMPPI</code>,

<code>CMPP</code>, <code>CVTLNI</code>, <code>CVTLN</code>, <code>CVTLPI</code>, <code>CVTLP</code>,

<code>CVTNLI</code>, <code>CVTNL</code>, <code>CVTNPI</code>, <code>CVTNP</code>, <code>CVTPLI</code>,

<code>CVTPL</code>, <code>CVTPNI</code>, <code>CVTPN</code>, <code>DIVPI</code>, <code>DIVP</code>,

<code>L2DR</code>, <code>L3DR</code>, <code>LOCCI</code>, <code>LOCC</code>, <code>MATCI</code>,

<code>MATC</code>, <code>MOVCI</code>, <code>MOVC</code>, <code>MOVRCI</code>, <code>MOVRC</code>,

<code>MOVTCI</code>, <code>MOVTC</code>, <code>MULPI</code>, <code>MULP</code>, <code>SCANCI</code>,

<code>SCANC</code>, <code>SKPCI</code>, <code>SKPC</code>, <code>SPANCI</code>, <code>SPANC</code>,

<code>SUBNI</code>, <code>SUBN</code>, <code>SUBPI</code>, and <code>SUBP</code>.



     <br><dt><code>-mcsm | -mno-csm</code>

     <dd>Enable (or disable) the use of the <code>CSM</code> instruction.



     <br><dt><code>-meis | -mno-eis</code>

     <dd>Enable (or disable) the use of the extended instruction set, which

consists of these instructions: <code>ASHC</code>, <code>ASH</code>, <code>DIV</code>,

<code>MARK</code>, <code>MUL</code>, <code>RTT</code>, <code>SOB</code> <code>SXT</code>, and

<code>XOR</code>.



     <br><dt><code>-mfis | -mkev11</code>

     <dd><dt><code>-mno-fis | -mno-kev11</code>

     <dd>Enable (or diasble) the use of the KEV11 floating-point instructions:

<code>FADD</code>, <code>FDIV</code>, <code>FMUL</code>, and <code>FSUB</code>.



     <br><dt><code>-mfpp | -mfpu | -mfp-11</code>

     <dd><dt><code>-mno-fpp | -mno-fpu | -mno-fp-11</code>

     <dd>Enable (or disable) the use of FP-11 floating-point instructions:

<code>ABSF</code>, <code>ADDF</code>, <code>CFCC</code>, <code>CLRF</code>, <code>CMPF</code>,

<code>DIVF</code>, <code>LDCFF</code>, <code>LDCIF</code>, <code>LDEXP</code>, <code>LDF</code>,

<code>LDFPS</code>, <code>MODF</code>, <code>MULF</code>, <code>NEGF</code>, <code>SETD</code>,

<code>SETF</code>, <code>SETI</code>, <code>SETL</code>, <code>STCFF</code>, <code>STCFI</code>,

<code>STEXP</code>, <code>STF</code>, <code>STFPS</code>, <code>STST</code>, <code>SUBF</code>, and

<code>TSTF</code>.



     <br><dt><code>-mlimited-eis | -mno-limited-eis</code>

     <dd>Enable (or disable) the use of the limited extended instruction set:

<code>MARK</code>, <code>RTT</code>, <code>SOB</code>, <code>SXT</code>, and <code>XOR</code>.



     <p>The -mno-limited-eis options also implies -mno-eis.



     <br><dt><code>-mmfpt | -mno-mfpt</code>

     <dd>Enable (or disable) the use of the <code>MFPT</code> instruction.



     <br><dt><code>-mmultiproc | -mno-multiproc</code>

     <dd>Enable (or disable) the use of multiprocessor instructions: <code>TSTSET</code> and

<code>WRTLCK</code>.



     <br><dt><code>-mmxps | -mno-mxps</code>

     <dd>Enable (or disable) the use of the <code>MFPS</code> and <code>MTPS</code> instructions.



     <br><dt><code>-mspl | -mno-spl</code>

     <dd>Enable (or disable) the use of the <code>SPL</code> instruction.



     <p>Enable (or disable) the use of the microcode instructions: <code>LDUB</code>,

<code>MED</code>, and <code>XFC</code>. 

</dl>



<h5 class="subsection">CPU Model Options</h5>



   <p>These options enable the instruction set extensions supported by a

particular CPU, and disables all other extensions.



     <dl>

<dt><code>-mka11</code>

     <dd>KA11 CPU.  Base line instruction set only.



     <br><dt><code>-mkb11</code>

     <dd>KB11 CPU.  Enable extended instruction set and <code>SPL</code>.



     <br><dt><code>-mkd11a</code>

     <dd>KD11-A CPU.  Enable limited extended instruction set.



     <br><dt><code>-mkd11b</code>

     <dd>KD11-B CPU.  Base line instruction set only.



     <br><dt><code>-mkd11d</code>

     <dd>KD11-D CPU.  Base line instruction set only.



     <br><dt><code>-mkd11e</code>

     <dd>KD11-E CPU.  Enable extended instruction set, <code>MFPS</code>, and <code>MTPS</code>.



     <br><dt><code>-mkd11f | -mkd11h | -mkd11q</code>

     <dd>KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended instruction set,

<code>MFPS</code>, and <code>MTPS</code>.



     <br><dt><code>-mkd11k</code>

     <dd>KD11-K CPU.  Enable extended instruction set, <code>LDUB</code>, <code>MED</code>,

<code>MFPS</code>, <code>MFPT</code>, <code>MTPS</code>, and <code>XFC</code>.



     <br><dt><code>-mkd11z</code>

     <dd>KD11-Z CPU.  Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,

<code>MFPT</code>, <code>MTPS</code>, and <code>SPL</code>.



     <br><dt><code>-mf11</code>

     <dd>F11 CPU.  Enable extended instruction set, <code>MFPS</code>, <code>MFPT</code>, and

<code>MTPS</code>.



     <br><dt><code>-mj11</code>

     <dd>J11 CPU.  Enable extended instruction set, <code>CSM</code>, <code>MFPS</code>,

<code>MFPT</code>, <code>MTPS</code>, <code>SPL</code>, <code>TSTSET</code>, and <code>WRTLCK</code>.



     <br><dt><code>-mt11</code>

     <dd>T11 CPU.  Enable limited extended instruction set, <code>MFPS</code>, and

<code>MTPS</code>. 

</dl>



<h5 class="subsection">Machine Model Options</h5>



   <p>These options enable the instruction set extensions supported by a

particular machine model, and disables all other extensions.



     <dl>

<dt><code>-m11/03</code>

     <dd>Same as <code>-mkd11f</code>.



     <br><dt><code>-m11/04</code>

     <dd>Same as <code>-mkd11d</code>.



     <br><dt><code>-m11/05 | -m11/10</code>

     <dd>Same as <code>-mkd11b</code>.



     <br><dt><code>-m11/15 | -m11/20</code>

     <dd>Same as <code>-mka11</code>.



     <br><dt><code>-m11/21</code>

     <dd>Same as <code>-mt11</code>.



     <br><dt><code>-m11/23 | -m11/24</code>

     <dd>Same as <code>-mf11</code>.



     <br><dt><code>-m11/34</code>

     <dd>Same as <code>-mkd11e</code>.



     <br><dt><code>-m11/34a</code>

     <dd>Ame as <code>-mkd11e</code> <code>-mfpp</code>.



     <br><dt><code>-m11/35 | -m11/40</code>

     <dd>Same as <code>-mkd11a</code>.



     <br><dt><code>-m11/44</code>

     <dd>Same as <code>-mkd11z</code>.



     <br><dt><code>-m11/45 | -m11/50 | -m11/55 | -m11/70</code>

     <dd>Same as <code>-mkb11</code>.



     <br><dt><code>-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94</code>

     <dd>Same as <code>-mj11</code>.



     <br><dt><code>-m11/60</code>

     <dd>Same as <code>-mkd11k</code>. 

</dl>



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