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<h4 class="section">i860 Opcodes</h4>



   <p>All of the Intel i860 machine instructions are supported. Please see

either <em>i860 Microprocessor Programmer's Reference Manual</em> or <em>i860 Microprocessor Architecture</em> for more information.



<h5 class="subsection">Other instruction support (pseudo-instructions)</h5>



   <p>For compatibility with some other i860 assemblers, a number of

pseudo-instructions are supported. While these are supported, they are

a very undesirable feature that should be avoided - in particular, when

they result in an expansion to multiple actual i860 instructions. Below

are the pseudo-instructions that result in expansions.

     <ul>

<li>Load large immediate into general register:



     <p>The pseudo-instruction <code>mov imm,%rn</code> (where the immediate does

not fit within a signed 16-bit field) will be expanded into:

     <pre class="smallexample">          orh large_imm@h,%r0,%rn

          or large_imm@l,%rn,%rn

          </pre>

     </p><li>Load/store with relocatable address expression:



     <p>For example, the pseudo-instruction <code>ld.b addr,%rn</code>

will be expanded into:

     <pre class="smallexample">          orh addr_exp@ha,%r0,%r31

          ld.l addr_exp@l(%r31),%rn

          </pre>



     <p>The analogous expansions apply to <code>ld.x, st.x, fld.x, pfld.x, fst.x</code>, and <code>pst.x</code> as well. 

</p><li>Signed large immediate with add/subtract:



     <p>If any of the arithmetic operations <code>adds, addu, subs, subu</code> are used

with an immediate larger than 16-bits (signed), then they will be expanded. 

For instance, the pseudo-instruction <code>adds large_imm,%rx,%rn</code> expands to:

     <pre class="smallexample">          orh large_imm@h,%r0,%r31

          or large_imm@l,%r31,%r31

          adds %r31,%rx,%rn

          </pre>

     </p><li>Unsigned large immediate with logical operations:



     <p>Logical operations (<code>or, andnot, or, xor</code>) also result in expansions. 

The pseudo-instruction <code>or large_imm,%rx,%rn</code> results in:

     <pre class="smallexample">          orh large_imm@h,%rx,%r31

          or large_imm@l,%r31,%rn

          </pre>



     <p>Similarly for the others, except for <code>and</code> which expands to:

     <pre class="smallexample">          andnot (-1 - large_imm)@h,%rx,%r31

          andnot (-1 - large_imm)@l,%r31,%rn

          </pre>

     </ul>



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