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Node:<a name="ARM%20Options">ARM Options</a>,
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<h4 class="section">Options</h4>
<dl>
<br><dt><code>-mcpu=</code><var>processor</var><code>[+</code><var>extension</var><code>...]</code>
<dd>This option specifies the target processor. The assembler will issue an
error message if an attempt is made to assemble an instruction which
will not execute on the target processor. The following processor names are
recognized:
<code>arm1</code>,
<code>arm2</code>,
<code>arm250</code>,
<code>arm3</code>,
<code>arm6</code>,
<code>arm60</code>,
<code>arm600</code>,
<code>arm610</code>,
<code>arm620</code>,
<code>arm7</code>,
<code>arm7m</code>,
<code>arm7d</code>,
<code>arm7dm</code>,
<code>arm7di</code>,
<code>arm7dmi</code>,
<code>arm70</code>,
<code>arm700</code>,
<code>arm700i</code>,
<code>arm710</code>,
<code>arm710t</code>,
<code>arm720</code>,
<code>arm720t</code>,
<code>arm740t</code>,
<code>arm710c</code>,
<code>arm7100</code>,
<code>arm7500</code>,
<code>arm7500fe</code>,
<code>arm7t</code>,
<code>arm7tdmi</code>,
<code>arm8</code>,
<code>arm810</code>,
<code>strongarm</code>,
<code>strongarm1</code>,
<code>strongarm110</code>,
<code>strongarm1100</code>,
<code>strongarm1110</code>,
<code>arm9</code>,
<code>arm920</code>,
<code>arm920t</code>,
<code>arm922t</code>,
<code>arm940t</code>,
<code>arm9tdmi</code>,
<code>arm9e</code>,
<code>arm946e-r0</code>,
<code>arm946e</code>,
<code>arm966e-r0</code>,
<code>arm966e</code>,
<code>arm10t</code>,
<code>arm10e</code>,
<code>arm1020</code>,
<code>arm1020t</code>,
<code>arm1020e</code>,
<code>ep9312</code> (ARM920 with Cirrus Maverick coprocessor),
<code>i80200</code> (Intel XScale processor)
and
<code>xscale</code>.
The special name <code>all</code> may be used to allow the
assembler to accept instructions valid for any ARM processor.
<p>In addition to the basic instruction set, the assembler can be told to
accept various extension mnemonics that extend the processor using the
co-processor instruction space. For example, <code>-mcpu=arm920+maverick</code>
is equivalent to specifying <code>-mcpu=ep9312</code>. The following extensions
are currently supported:
<code>+maverick</code>
and
<code>+xscale</code>.
<br><dt><code>-march=</code><var>architecture</var><code>[+</code><var>extension</var><code>...]</code>
<dd>This option specifies the target architecture. The assembler will issue
an error message if an attempt is made to assemble an instruction which
will not execute on the target architecture. The following architecture
names are recognized:
<code>armv1</code>,
<code>armv2</code>,
<code>armv2a</code>,
<code>armv2s</code>,
<code>armv3</code>,
<code>armv3m</code>,
<code>armv4</code>,
<code>armv4xm</code>,
<code>armv4t</code>,
<code>armv4txm</code>,
<code>armv5</code>,
<code>armv5t</code>,
<code>armv5txm</code>,
<code>armv5te</code>,
<code>armv5texp</code>
and
<code>xscale</code>.
If both <code>-mcpu</code> and
<code>-march</code> are specified, the assembler will use
the setting for <code>-mcpu</code>.
<p>The architecture option can be extended with the same instruction set
extension options as the <code>-mcpu</code> option.
<br><dt><code>-mfpu=</code><var>floating-point-format</var><code></code>
<dd>
This option specifies the floating point format to assemble for. The
assembler will issue an error message if an attempt is made to assemble
an instruction which will not execute on the target floating point unit.
The following format options are recognized:
<code>softfpa</code>,
<code>fpe</code>,
<code>fpe2</code>,
<code>fpe3</code>,
<code>fpa</code>,
<code>fpa10</code>,
<code>fpa11</code>,
<code>arm7500fe</code>,
<code>softvfp</code>,
<code>softvfp+vfp</code>,
<code>vfp</code>,
<code>vfp10</code>,
<code>vfp10-r0</code>,
<code>vfp9</code>,
<code>vfpxd</code>,
<code>arm1020t</code>
and
<code>arm1020e</code>.
<p>In addition to determining which instructions are assembled, this option
also affects the way in which the <code>.double</code> assembler directive behaves
when assembling little-endian code.
<p>The default is dependent on the processor selected. For Architecture 5 or
later, the default is to assembler for VFP instructions; for earlier
architectures the default is to assemble for FPA instructions.
<br><dt><code>-mthumb</code>
<dd>This option specifies that the assembler should start assembling Thumb
instructions; that is, it should behave as though the file starts with a
<code>.code 16</code> directive.
<br><dt><code>-mthumb-interwork</code>
<dd>This option specifies that the output generated by the assembler should
be marked as supporting interworking.
<br><dt><code>-mapcs [26|32]</code>
<dd>This option specifies that the output generated by the assembler should
be marked as supporting the indicated version of the Arm Procedure.
Calling Standard.
<br><dt><code>-matpcs</code>
<dd>This option specifies that the output generated by the assembler should
be marked as supporting the Arm/Thumb Procedure Calling Standard. If
enabled this option will cause the assembler to create an empty
debugging section in the object file called .arm.atpcs. Debuggers can
use this to determine the ABI being used by.
<br><dt><code>-mapcs-float</code>
<dd>This indicates the the floating point variant of the APCS should be
used. In this variant floating point arguments are passed in FP
registers rather than integer registers.
<br><dt><code>-mapcs-reentrant</code>
<dd>This indicates that the reentrant variant of the APCS should be used.
This variant supports position independent code.
<br><dt><code>-EB</code>
<dd>This option specifies that the output generated by the assembler should
be marked as being encoded for a big-endian processor.
<br><dt><code>-EL</code>
<dd>This option specifies that the output generated by the assembler should
be marked as being encoded for a little-endian processor.
<br><dt><code>-k</code>
<dd>This option specifies that the output of the assembler should be marked
as position-independent code (PIC).
<br><dt><code>-moabi</code>
<dd>This indicates that the code should be assembled using the old ARM ELF
conventions, based on a beta release release of the ARM-ELF
specifications, rather than the default conventions which are based on
the final release of the ARM-ELF specifications.
</dl>
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