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<h5 class="subsection">Compare-and-Branch</h5>



   <p>The 960 architectures provide combined Compare-and-Branch instructions

that permit you to store the branch target in the lower 13 bits of the

instruction word itself.  However, if you specify a branch target far

enough away that its address won't fit in 13 bits, the assembler can

either issue an error, or convert your Compare-and-Branch instruction

into separate instructions to do the compare and the branch.



   <p>Whether <code>as</code> gives an error or expands the instruction depends

on two choices you can make: whether you use the <code>-no-relax</code> option,

and whether you use a "Compare and Branch" instruction or a "Compare

and Jump" instruction.  The "Jump" instructions are <em>always</em>

expanded if necessary; the "Branch" instructions are expanded when

necessary <em>unless</em> you specify <code>-no-relax</code>--in which case

<code>as</code> gives an error instead.



   <p>These are the Compare-and-Branch instructions, their "Jump" variants,

and the instruction pairs they may expand into:



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