nv_data.c

This network protcol stack,it is very strong and powerful!

/************************************************************************************
* This module contains the NV Data module
*
* Note!! The specified link sequence is very important for the allocation of NV RAM
*        A changed link sequence can change the NV RAM layout and the pointer cannot
*        read the correct NV RAM data.
*
* Author(s):  Michael V. Christensen
*
* (c) Copyright 2004, Freescale, Inc.  All rights reserved.
*
* Freescale Confidential Proprietary
* Digianswer Confidential
*
* No part of this document must be reproduced in any form - including copied,
* transcribed, printed or by any electronic means - without specific written
* permission from Freescale.
*
* Last Inspected: 29-03-01
* Last Tested:
************************************************************************************/


#include "DigiType.h"
#include "NV_Data.h"
#include "Target.h"
#include "App_Target.h"

// **************************************************************************

#pragma PLACE_CONST_SEG(BOOTLOADER_APP_NV_DATA0)

#define SPACE " "

// Initialized with default values
volatile const Init_NV_RAM_Struct_t NV_RAM0 =
{
	"Demo Appli Ver 1.00 Build: "__DATE__ SPACE __TIME__,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,
	0x0001,
	0x00,
	0x02,
#ifdef SYSTEM_CLOCK_8MHZ
	0x08, // 8 MHz
	(ABEL_XTAL_TRIM | ABEL_XTAL_BIAS_CURRENT | ABEL_CHIP_RATE | ABEL_CLKO_FREQ),
	(ABEL_CCA_ENERGY_DETECT_THRESHOLD | ABEL_POWER_COMPENSATION_OFFSET),
// ICG
	0x18,
	0x00, // 0x00 => CPU clk=16 MHz, Buc clk = 8 MHz
// ICG Filter
	0x02,
	0x40,
// SCI
	0x00,
	0x1A, // 1A => 19200 @ 8 MHz
#endif SYSTEM_CLOCK_8MHZ

#ifdef SYSTEM_CLOCK_12MHZ
	0x0C, // 12 MHz
	(ABEL_XTAL_TRIM | ABEL_XTAL_BIAS_CURRENT | ABEL_CHIP_RATE | ABEL_CLKO_FREQ),
	(ABEL_CCA_ENERGY_DETECT_THRESHOLD | ABEL_POWER_COMPENSATION_OFFSET),
// ICG clock
	0x18,
	0x41, // 0x41 => CPU clk=24 MHz, Buc clk = 12 MHz
// ICG Filter
	0x02,
	0x40,
// SCI
	0x00,
	0x27, // 0x27 => 19200 @ 12 MHz
#endif SYSTEM_CLOCK_12MHZ

#ifdef SYSTEM_CLOCK_16MHZ
	0x10, // 16 MHz
	(ABEL_XTAL_TRIM | ABEL_XTAL_BIAS_CURRENT | ABEL_CHIP_RATE | ABEL_CLKO_FREQ),
	(ABEL_CCA_ENERGY_DETECT_THRESHOLD | ABEL_POWER_COMPENSATION_OFFSET),
// ICG clock
	0x18,
	0x20, // 0x20 => CPU clk=32 MHz, Buc clk = 16 MHz
// ICG Filter
	0x02,
	0x40,
// SCI
	0x00,
	0x34, // 0x34 => 19200 @ 16 MHz  
#endif SYSTEM_CLOCK_16MHZ
#ifdef SYSTEM_CLOCK_16_78MHZ
	0x10, // 16 MHz -> ~16,78 MHz
	//0x3646,
  (ABEL_XTAL_TRIM | ABEL_XTAL_BIAS_CURRENT | ABEL_CHIP_RATE | 6),
	(ABEL_CCA_ENERGY_DETECT_THRESHOLD | ABEL_POWER_COMPENSATION_OFFSET),
// ICG clock
	0x18,
	0x60, // 0x60 => CPU clk=32,78 MHz, Buc clk = 16,39 MHz
// ICG Filter
	0x02,
	0x40,
// SCI
	0x00,
	0x09, // 0x09 => 115200 @ 16,78 MHz
#endif SYSTEM_CLOCK_16_78MHZ


	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0x00,
	0x00,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFFFF,
	0xFF,
	0xFF,
	0xFF,
	// Application_Section
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
	0xFF,0xFF,0xFF,
	NV_SYSTEM_FLAG
};

#if defined(BOOTLOADER_ENABLED) || defined(FOR_BOOTLOADER_ONLY)

#pragma PLACE_CONST_SEG(BOOTLOADER_APP_NV_DATA1)
// This is the empty "copy" sector - contains all 0xFF's
volatile const NV_RAM_Struct_t NV_RAM1;

#pragma RESTORE_CONST_SEG

#endif // !defined(BOOTLOADER_ENABLED) || defined(FOR_BOOTLOADER_ONLY)

// **************************************************************************

#pragma PLACE_DATA_SEG(NV_RAM_POINTER)

volatile NV_RAM_Struct_t *NV_RAM_ptr; // A pointer to NV Data will be setup in init code.

#pragma RESTORE_DATA_SEG

// **************************************************************************

void NV_Data_Init(void)
{
	// Setup NV RAM pointer after update.
}