📄 target.h
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/************************************************************************************
* The global header file containing platform specific definitions for
* the embedded platform
*
* Author(s): Thomas O. Jensen
*
* (c) Copyright 2004, Freescale, Inc. All rights reserved.
*
* Freescale Confidential Proprietary
* Digianswer Confidential
*
* No part of this document must be reproduced in any form - including copied,
* transcribed, printed or by any electronic means - without specific written
* permission from Freescale.
*
* Last Inspected:
* Last Tested:
************************************************************************************/
#ifndef _TARGET_SPECIFIC_H_
#define _TARGET_SPECIFIC_H_
#include "gb60_io.h"
#include "AllTargets.h"
//**********************************************************************************
// Define target Hardware platform:
//**********************************************************************************
#if !(defined(TARGET_DIG528_2) || defined(TARGET_DIG536_2) || defined(TARGET_DIG534_1) || defined(TARGET_AXIOM_GB60) || defined(TARGET_RD01))
// Enable target platform
//#define TARGET_DIG528_2 // 13192-EVB
//#define TARGET_DIG536_2 // 13192-SARD
//#define TARGET_DIG534_1 // Sniffer
//#define TARGET_AXIOM_GB60 // 802.15.4 Dev Platform
#define TARGET_RD01 // For all boards which uses the Freescale reference design 01 layout
#endif
//**********************************************************************************
#ifdef TARGET_AXIOM_GB60
// Define HW pin mappings
#define ABEL_PORT1 PTDD
#define ABEL_ATT_PIN (1<<5)
#define ABEL_RxTx_PIN (1<<6)
#define ABEL_RESET_PIN (1<<7)
#define ABEL_PORT2 PTBD
#define ABEL_GPIO1_PIN (1<<4)
#define ABEL_GPIO2_PIN (1<<5)
#define ABEL_ANT_SWITCH_PIN 0x00
// Define HW port mappings
// Port A - not used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_A //PTAD = 0x00;\
//PTAPE = 0x00;\
//PTADD = 0x00; // Set as input
// Port B - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_B PTBD = 0x00;\
PTBPE = 0x00;\
PTBDD = (ABEL_ANT_SWITCH_PIN);\
PTBDD &=(~ABEL_GPIO1_PIN & ~ABEL_GPIO2_PIN); // Set as input
// Port C - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_C PTCD = 0x00;\
PTCPE = 0x00;\
PTCDD = 0x63;// Verify use!!!!!!!
// Port D - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_D PTDD = 0x00;\
PTDPE = 0x00;\
PTDDD = (0x01 | ABEL_RESET_PIN | ABEL_ATT_PIN | ABEL_RxTx_PIN);
// Define HW macros - DO NOT EDIT
#define HWAssertAbelReset ABEL_PORT1 &= ~ABEL_RESET_PIN; // Reset = 0;
#define HWDeAssertAbelReset ABEL_PORT1 |= ABEL_RESET_PIN; // Reset = 1;
#define RxTxEnable ABEL_PORT1 |= ABEL_RxTx_PIN; // RxTxEnable = 1;
#define RxTxDisable ABEL_PORT1 &= ~ABEL_RxTx_PIN; // RxTxDisable = 0;
#define AttEnable ABEL_PORT1 |= ABEL_ATT_PIN; // Attention Enable = 1;
#define AttDisable ABEL_PORT1 &= ~ABEL_ATT_PIN; // Attention Disable = 0;
#define IsAbelActive() (ABEL_PORT2 & ABEL_GPIO1_PIN)
#define IsAbelCrcOk() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define IsAbelCcaBusy() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define RX_ANTENNE_ENABLED //ABEL_PORT2 &= ~ABEL_ANT_SWITCH_PIN;
#define RX_DISABLE_LNA
#define TX_ANTENNE_ENABLED //ABEL_PORT2 |= ABEL_ANT_SWITCH_PIN;
#define TX_DISABLE_PA
#define PHY_TYPE "AX-0308"
#endif TARGET_AXIOM_GB60
//**********************************************************************************
#if defined TARGET_DIG536_2 || defined TARGET_DIG528_2 || defined TARGET_RD01 // 13192-SARD or 13192-EVB
// Define HW pin mappings
#define ABEL_PORT1 PTCD
#define ABEL_ATT_PIN (1<<2)
#define ABEL_RxTx_PIN (1<<3)
#define ABEL_RESET_PIN (1<<4)
#define ABEL_PORT2 PTBD
#define ABEL_GPIO1_PIN (1<<4)
#define ABEL_GPIO2_PIN (1<<5)
#define ABEL_ANT_SWITCH_PIN (1<<6)
// Define HW port mappings
// Port A - not used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_A //PTAD = 0x00;\
//PTAPE = 0x00;\
//PTADD = 0x00; // Set as input
// Port B - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_B PTBD = 0x00;\
PTBPE = 0x00;\
PTBDD = (ABEL_ANT_SWITCH_PIN);\
PTBDD &=(~ABEL_GPIO1_PIN & ~ABEL_GPIO2_PIN); // Set as input
// Port C - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_C PTCD = 0x00;\
PTCPE = 0x00;\
PTCDD = (ABEL_RESET_PIN | ABEL_ATT_PIN | ABEL_RxTx_PIN );
// Port D - not used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_D //PTDD = 0x00;\
//PTDPE = 0x00;\
//PTDDD = 0x00;
// Define HW macros - DO NOT EDIT
#define HWAssertAbelReset ABEL_PORT1 &= ~ABEL_RESET_PIN; // Reset = 0;
#define HWDeAssertAbelReset ABEL_PORT1 |= ABEL_RESET_PIN; // Reset = 1;
#define RxTxEnable ABEL_PORT1 |= ABEL_RxTx_PIN; // RxTxEnable = 1;
#define RxTxDisable ABEL_PORT1 &= ~ABEL_RxTx_PIN; // RxTxDisable = 0;
#define AttEnable ABEL_PORT1 |= ABEL_ATT_PIN; // Attention Enable = 1;
#define AttDisable ABEL_PORT1 &= ~ABEL_ATT_PIN; // Attention Disable = 0;
#define IsAbelActive() (ABEL_PORT2 & ABEL_GPIO1_PIN)
#define IsAbelCrcOk() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define IsAbelCcaBusy() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define RX_ANTENNE_ENABLED ABEL_PORT2 &= ~ABEL_ANT_SWITCH_PIN;
#define RX_DISABLE_LNA
#define TX_ANTENNE_ENABLED ABEL_PORT2 |= ABEL_ANT_SWITCH_PIN;
#define TX_DISABLE_PA
#if defined TARGET_DIG528_2
#define PHY_TYPE " DIG528"
#elif defined TARGET_DIG536_2
#define PHY_TYPE " DIG536"
#else
#define PHY_TYPE " RD01 "
#endif
#endif TARGET_DIG536_2 || TARGET_DIG528_2 || defined TARGET_RD01
//**********************************************************************************
#ifdef TARGET_DIG534_1 // Sniffer
// Define HW pin mappings
#define ABEL_PORT1 PTBD
#define ABEL_ATT_PIN (1<<2)
#define ABEL_RxTx_PIN (1<<3)
#define ABEL_RESET_PIN (1<<1)
#define ABEL_PORT2 PTBD
#define ABEL_GPIO1_PIN (1<<4)
#define ABEL_GPIO2_PIN (1<<5)
#define ABEL_ANT_SWITCH_PIN (1<<6)
// Define HW port mappings
// Port A - not used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_A //PTAD = 0x00;\
//PTAPE = 0x00;\
//PTADD = 0x00; // Set as input
// Port B - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_B PTBD = 0x00;\
PTBPE = 0x00;\
PTBDD = (ABEL_RESET_PIN | ABEL_ATT_PIN | ABEL_RxTx_PIN | ABEL_ANT_SWITCH_PIN);\
PTBDD &=(~ABEL_GPIO1_PIN & ~ABEL_GPIO2_PIN); // Set as input
// Port C - used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_C PTCD = 0x00;\
PTCPE = 0x00;\
PTCDD = 0x63; // Verify use!!!!!!!
// Port D - not used by PHY layer. Reinitialize in application if needed.
#define mSETUP_PORT_D //PTDD = 0x00;\
//PTDPE = 0x00;\
//PTDDD = 0x00;
// Define HW macros - DO NOT EDIT
#define HWAssertAbelReset ABEL_PORT1 &= ~ABEL_RESET_PIN; // Reset = 0;
#define HWDeAssertAbelReset ABEL_PORT1 |= ABEL_RESET_PIN; // Reset = 1;
#define RxTxEnable ABEL_PORT1 |= ABEL_RxTx_PIN; // RxTxEnable = 1;
#define RxTxDisable ABEL_PORT1 &= ~ABEL_RxTx_PIN; // RxTxDisable = 0;
#define AttEnable ABEL_PORT1 |= ABEL_ATT_PIN; // Attention Enable = 1;
#define AttDisable ABEL_PORT1 &= ~ABEL_ATT_PIN; // Attention Disable = 0;
#define IsAbelActive() (ABEL_PORT2 & ABEL_GPIO1_PIN)
#define IsAbelCrcOk() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define IsAbelCcaBusy() (ABEL_PORT2 & ABEL_GPIO2_PIN)
#define RX_ANTENNE_ENABLED ABEL_PORT2 &= ~ABEL_ANT_SWITCH_PIN;
#define RX_DISABLE_LNA
#define TX_ANTENNE_ENABLED ABEL_PORT2 |= ABEL_ANT_SWITCH_PIN;
#define TX_DISABLE_PA
// #define AntSwRx PTBD &= ~0x40; // PTB6
// #define AntSwTx PTBD |= 0x40;
#define PHY_TYPE "DIG534 "
#endif TARGET_DIG534_1
//**********************************************************************************
#endif _TARGET_SPECIFIC_H_
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