📄 9s08rx.inc
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; Based on CPU DB MC9S08RG60, version 2.87.009 (RegistersPrg V1.061)
; ###################################################################
; Filename : MC9S08RG60.h
; Processor : MC9S08RG60
; FileFormat: V1.061
; DataSheet : MC9S08RG60/D Rev. 1.07, 2/2004
; Compiler : Metrowerks C compiler
; Date/Time : 08.04.2004, 09:14
; Abstract :
; This implements an IO devices mapping.
;
; (c) Copyright UNIS, spol. s r.o. 1997-2003
; UNIS, spol. s r.o.
; Jundrovska 33
; 624 00 Brno
; Czech Republic
; http : www.processorexpert.com
; mail : info@processorexpert.com
; ###################################################################
;*** Memory Map and Interrupt Vectors
;******************************************
; Commented out for V3.0 SP; Creates conflicts with asm source file stub: ROMStart: equ $0000182C
ROMEnd: equ $0000FFBF
Z_RAMStart: equ $00000046
Z_RAMEnd: equ $000000FF
; Commented out for V3.0 SP; Creates conflicts with asm source file stub: RAMStart: equ $00000100
RAMEnd: equ $00000845
ROM1Start: equ $00000846
ROM1End: equ $000017FF
;
Vspi1: equ $0000FFE0
Vrti: equ $0000FFE2
Vkeyboard2: equ $0000FFE4
Vkeyboard1: equ $0000FFE6
Vacmp1: equ $0000FFE8
Vcmt: equ $0000FFEA
Vsci1tx: equ $0000FFEC
Vsci1rx: equ $0000FFEE
Vsci1err: equ $0000FFF0
Vtpm1ovf: equ $0000FFF2
Vtpm1ch1: equ $0000FFF4
Vtpm1ch0: equ $0000FFF6
Virq: equ $0000FFF8
Vlvd: equ $0000FFFA
Vswi: equ $0000FFFC
Vreset: equ $0000FFFE
;
;*** PTAD - Port A Data Register; 0x00000000 ***
PTAD: equ $00000000 ;*** PTAD - Port A Data Register; 0x00000000 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTAD_PTAD0: equ 0 ; Port A Data Register Bit 0
PTAD_PTAD1: equ 1 ; Port A Data Register Bit 1
PTAD_PTAD2: equ 2 ; Port A Data Register Bit 2
PTAD_PTAD3: equ 3 ; Port A Data Register Bit 3
PTAD_PTAD4: equ 4 ; Port A Data Register Bit 4
PTAD_PTAD5: equ 5 ; Port A Data Register Bit 5
PTAD_PTAD6: equ 6 ; Port A Data Register Bit 6
PTAD_PTAD7: equ 7 ; Port A Data Register Bit 7
; bit position masks
mPTAD_PTAD0: equ %00000001
mPTAD_PTAD1: equ %00000010
mPTAD_PTAD2: equ %00000100
mPTAD_PTAD3: equ %00001000
mPTAD_PTAD4: equ %00010000
mPTAD_PTAD5: equ %00100000
mPTAD_PTAD6: equ %01000000
mPTAD_PTAD7: equ %10000000
;*** PTAPE - Pullup Enable for Port; 0x00000001 ***
PTAPE: equ $00000001 ;*** PTAPE - Pullup Enable for Port; 0x00000001 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTAPE_PTAPE0: equ 0 ; Pullup Enable for Port A Bit 0
PTAPE_PTAPE1: equ 1 ; Pullup Enable for Port A Bit 1
PTAPE_PTAPE2: equ 2 ; Pullup Enable for Port A Bit 2
PTAPE_PTAPE3: equ 3 ; Pullup Enable for Port A Bit 3
PTAPE_PTAPE4: equ 4 ; Pullup Enable for Port A Bit 4
PTAPE_PTAPE5: equ 5 ; Pullup Enable for Port A Bit 5
PTAPE_PTAPE6: equ 6 ; Pullup Enable for Port A Bit 6
PTAPE_PTAPE7: equ 7 ; Pullup Enable for Port A Bit 7
; bit position masks
mPTAPE_PTAPE0: equ %00000001
mPTAPE_PTAPE1: equ %00000010
mPTAPE_PTAPE2: equ %00000100
mPTAPE_PTAPE3: equ %00001000
mPTAPE_PTAPE4: equ %00010000
mPTAPE_PTAPE5: equ %00100000
mPTAPE_PTAPE6: equ %01000000
mPTAPE_PTAPE7: equ %10000000
;*** PTADD - Data Direction Register A; 0x00000003 ***
PTADD: equ $00000003 ;*** PTADD - Data Direction Register A; 0x00000003 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTADD_PTADD0: equ 0 ; Data Direction for Port A Bit 0
PTADD_PTADD1: equ 1 ; Data Direction for Port A Bit 1
PTADD_PTADD2: equ 2 ; Data Direction for Port A Bit 2
PTADD_PTADD3: equ 3 ; Data Direction for Port A Bit 3
PTADD_PTADD4: equ 4 ; Data Direction for Port A Bit 4
PTADD_PTADD5: equ 5 ; Data Direction for Port A Bit 5
PTADD_PTADD6: equ 6 ; Data Direction for Port A Bit 6
PTADD_PTADD7: equ 7 ; Data Direction for Port A Bit 7
; bit position masks
mPTADD_PTADD0: equ %00000001
mPTADD_PTADD1: equ %00000010
mPTADD_PTADD2: equ %00000100
mPTADD_PTADD3: equ %00001000
mPTADD_PTADD4: equ %00010000
mPTADD_PTADD5: equ %00100000
mPTADD_PTADD6: equ %01000000
mPTADD_PTADD7: equ %10000000
;*** PTBD - Port B Data Register; 0x00000004 ***
PTBD: equ $00000004 ;*** PTBD - Port B Data Register; 0x00000004 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTBD_PTBD0: equ 0 ; Port B Data Register Bit 0
PTBD_PTBD1: equ 1 ; Port B Data Register Bit 1
PTBD_PTBD2: equ 2 ; Port B Data Register Bit 2
PTBD_PTBD3: equ 3 ; Port B Data Register Bit 3
PTBD_PTBD4: equ 4 ; Port B Data Register Bit 4
PTBD_PTBD5: equ 5 ; Port B Data Register Bit 5
PTBD_PTBD6: equ 6 ; Port B Data Register Bit 6
PTBD_PTBD7: equ 7 ; Port B Data Register Bit 7
; bit position masks
mPTBD_PTBD0: equ %00000001
mPTBD_PTBD1: equ %00000010
mPTBD_PTBD2: equ %00000100
mPTBD_PTBD3: equ %00001000
mPTBD_PTBD4: equ %00010000
mPTBD_PTBD5: equ %00100000
mPTBD_PTBD6: equ %01000000
mPTBD_PTBD7: equ %10000000
;*** PTBPE - Pullup Enable for Port B; 0x00000005 ***
PTBPE: equ $00000005 ;*** PTBPE - Pullup Enable for Port B; 0x00000005 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTBPE_PTBPE0: equ 0 ; Pullup Enable for Port B Bit 0
PTBPE_PTBPE1: equ 1 ; Pullup Enable for Port B Bit 1
PTBPE_PTBPE2: equ 2 ; Pullup Enable for Port B Bit 2
PTBPE_PTBPE3: equ 3 ; Pullup Enable for Port B Bit 3
PTBPE_PTBPE4: equ 4 ; Pullup Enable for Port B Bit 4
PTBPE_PTBPE5: equ 5 ; Pullup Enable for Port B Bit 5
PTBPE_PTBPE6: equ 6 ; Pullup Enable for Port B Bit 6
PTBPE_PTBPE7: equ 7 ; Pullup Enable for Port B Bit 7
; bit position masks
mPTBPE_PTBPE0: equ %00000001
mPTBPE_PTBPE1: equ %00000010
mPTBPE_PTBPE2: equ %00000100
mPTBPE_PTBPE3: equ %00001000
mPTBPE_PTBPE4: equ %00010000
mPTBPE_PTBPE5: equ %00100000
mPTBPE_PTBPE6: equ %01000000
mPTBPE_PTBPE7: equ %10000000
;*** PTBDD - Data Direction Register B; 0x00000007 ***
PTBDD: equ $00000007 ;*** PTBDD - Data Direction Register B; 0x00000007 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTBDD_PTBDD0: equ 0 ; Data Direction for Port B Bit 0
PTBDD_PTBDD1: equ 1 ; Data Direction for Port B Bit 1
PTBDD_PTBDD2: equ 2 ; Data Direction for Port B Bit 2
PTBDD_PTBDD3: equ 3 ; Data Direction for Port B Bit 3
PTBDD_PTBDD4: equ 4 ; Data Direction for Port B Bit 4
PTBDD_PTBDD5: equ 5 ; Data Direction for Port B Bit 5
PTBDD_PTBDD6: equ 6 ; Data Direction for Port B Bit 6
PTBDD_PTBDD7: equ 7 ; Data Direction for Port B Bit 7
; bit position masks
mPTBDD_PTBDD0: equ %00000001
mPTBDD_PTBDD1: equ %00000010
mPTBDD_PTBDD2: equ %00000100
mPTBDD_PTBDD3: equ %00001000
mPTBDD_PTBDD4: equ %00010000
mPTBDD_PTBDD5: equ %00100000
mPTBDD_PTBDD6: equ %01000000
mPTBDD_PTBDD7: equ %10000000
;*** PTCD - Port C Data Register; 0x00000008 ***
PTCD: equ $00000008 ;*** PTCD - Port C Data Register; 0x00000008 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTCD_PTCD0: equ 0 ; Port C Data Register Bit 0
PTCD_PTCD1: equ 1 ; Port C Data Register Bit 1
PTCD_PTCD2: equ 2 ; Port C Data Register Bit 2
PTCD_PTCD3: equ 3 ; Port C Data Register Bit 3
PTCD_PTCD4: equ 4 ; Port C Data Register Bit 4
PTCD_PTCD5: equ 5 ; Port C Data Register Bit 5
PTCD_PTCD6: equ 6 ; Port C Data Register Bit 6
PTCD_PTCD7: equ 7 ; Port C Data Register Bit 7
; bit position masks
mPTCD_PTCD0: equ %00000001
mPTCD_PTCD1: equ %00000010
mPTCD_PTCD2: equ %00000100
mPTCD_PTCD3: equ %00001000
mPTCD_PTCD4: equ %00010000
mPTCD_PTCD5: equ %00100000
mPTCD_PTCD6: equ %01000000
mPTCD_PTCD7: equ %10000000
;*** PTCPE - Pullup Enable for Port C; 0x00000009 ***
PTCPE: equ $00000009 ;*** PTCPE - Pullup Enable for Port C; 0x00000009 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PTCPE_PTCPE0: equ 0 ; Pullup Enable for Port C Bit 0
PTCPE_PTCPE1: equ 1 ; Pullup Enable for Port C Bit 1
PTCPE_PTCPE2: equ 2 ; Pullup Enable for Port C Bit 2
PTCPE_PTCPE3: equ 3 ; Pullup Enable for Port C Bit 3
PTCPE_PTCPE4: equ 4 ; Pullup Enable for Port C Bit 4
PTCPE_PTCPE5: equ 5 ; Pullup Enable for Port C Bit 5
PTCPE_PTCPE6: equ 6 ; Pullup Enable for Port C Bit 6
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