ezhal_x86.h

嵌入式实时内核源代码

//
// $Id: ezhal_x86.h,v 1.9 2005/06/10 05:45:14 weihan Exp $
//
//      HW-dependent types and definitions. Shouldn't #include any other
//      header files.
//
#ifndef _EZX86PCHAL_H_
#define _EZX86PCHAL_H_

#include "eztypes.h"
#include "ezhal_impl.h"
#include "ezhalregister.h"
#include "assert.h"

#define EZ_MIN_STACK_SIZE   0x0 //TODO: need to modify to the minimal value

//
//Idle
//
inline void EzHALIdle()
{
    ASM("hlt;");
}

//
//Interrupt operation
//
#define EZ_INTR_ON          EFLAG_IF
#define EZ_INTR_OFF         0

inline UINT EzHALGetInterrupt()
{
    return EzHALSaveFlags() & EFLAG_IF;
}

inline void EzHALSetInterrupt(UINT uNewPosture)
{
    // x86 only support two interrupt states.
    assert(uNewPosture == EZ_INTR_ON || uNewPosture == EZ_INTR_OFF);
    if (uNewPosture) ASM("sti" : : : "memory");
    else             ASM("cli" : : : "memory");
}

inline void EzHALEnableInterrupt()
{
    ASM("sti" : : : "memory");
}

inline void EzHALDisableInterrupt()
{
    ASM("cli" : : : "memory");
}

inline BOOL EzHALIsInterruptEnabled()
{
    return EzHALGetInterrupt() == EZ_INTR_ON;
}

/*

inline void EzHALAtomicAdd(INT *pnDestOperand, INT nSrcOperand)
{
    ASM("addl   %1, %0;"
        :"=m"(*pnDestOperand) :"ir"(nSrcOperand), "m"(*pnDestOperand));
}

inline void EzHALAtomicDec(INT *pnDestOperand)
{
    ASM("decl   %0;"
        :"=m"(*pnDestOperand) :"m"(*pnDestOperand));
}

inline void EzHALAtomicSub(INT *pnDestOperand, INT nSrcOperand)
{
    ASM("subl   %1, %0;"
        :"=m"(*pnDestOperand) :"ir"(nSrcOperand), "m"(*pnDestOperand));
}

inline void EzHALAtomicAnd(INT *pnDestOperand, INT nSrcOperand)
{
    ASM("andl   %1, %0;"
        :"=m"(*pnDestOperand) :"ir"(nSrcOperand), "m"(*pnDestOperand));
}

inline void EzHALAtomicOr(INT *pnDestOperand, INT nSrcOperand)
{
    ASM("orl    %1, %0;"
        :"=m"(*pnDestOperand) :"ir"(nSrcOperand), "m"(*pnDestOperand));
}

inline void *EzHALAtomicExchgPtr(void **ppvTarget, void *pvValue)
{
    void *pvOriginalTarget;

    ASM("xchg   %%eax, (%%edx);"
        :"=a"(pvOriginalTarget)
        :"a"(pvValue), "d"(ppvTarget));

    return pvOriginalTarget;
}

inline void *EzHALAtomicCmpExchgPtr(
        void **ppvDestination, void *pvExchange, void *pvComperand)
{
    void *pvOriginalDestination;

    ASM("cmpxchg    %%ecx, (%%edx);"
        :"=a"(pvOriginalDestination)
        :"a"(pvComperand), "c"(pvExchange), "d"(ppvDestination));

    return pvOriginalDestination;
}

*/

inline void EzHALAtomicInc(ATOM *pnDestOperand)
{
    ASM("incl   %0;"
        :"=m"(*pnDestOperand) :"m"(*pnDestOperand));
}

inline UINT EzHALAtomicExchg(ATOM *puTarget, UINT uValue)
{
    UINT uOriginalTarget;

    ASM("xchg   %%eax, (%%edx);"
        :"=a"(uOriginalTarget)
        :"a"(uValue), "d"(puTarget));

    return uOriginalTarget;
}


inline UINT EzHALAtomicCmpExchg(
        ATOM *puDestination, UINT uExchange, UINT uComperand)
{
    UINT uOriginalDestination;

    ASM("cmpxchg    %%ecx, (%%edx);"
        :"=a"(uOriginalDestination)
        :"a"(uComperand), "c"(uExchange), "d"(puDestination));

    return uOriginalDestination;
}

inline UINT EzHALAtomicExchgAdd(ATOM *puAddend, UINT uIncrement)
{
    UINT uOriginalAddend;

    ASM("xadd   %%eax, (%%edx);"
        :"=a"(uOriginalAddend)
        :"a"(uIncrement), "d"(puAddend));

    return uOriginalAddend;
}

//
//IO instruction
//
inline void EzHALOutb(ADDRESS port, UINT8 u8Data)
{
    ASM("outb   %%al, %%dx;"
        : :"a"(u8Data), "d"(port));
}

inline void EzHALOutw(ADDRESS port, UINT16 u16Data)
{
    ASM("outw   %%ax, %%dx;"
        : :"a"(u16Data), "d"(port));
}

inline void EzHALOutl(ADDRESS port, UINT16 u32Data)
{
    ASM("outl   %%eax, %%dx;"
        : :"a"(u32Data), "d"(port));
}

inline UINT8 EzHALInb(ADDRESS port)
{
    UINT8 u8Data;
    ASM("inb    %%dx, %%al;"
        :"=a"(u8Data) :"d"(port));
    return u8Data;
}

inline UINT16 EzHALInw(ADDRESS port)
{
    UINT16 u16Data;
    ASM("inw    %%dx, %%ax;"
        :"=a"(u16Data) :"d"(port));
    return u16Data;
}

inline UINT32 EzHALInl(ADDRESS port)
{
    UINT32 u32Data;
    ASM("inl    %%dx, %%eax;"
        :"=a"(u32Data) :"d"(port));
    return u32Data;
}

//
//thread hardware context
//
#define SIZEOF_FPU_DATA     80

typedef struct EzFPUContext {
    UINT32    controlWord;
    UINT32    statusWord;
    UINT32    tagWord;
    UINT32    instructionPointerOffset;
    UINT32    instructionPointerSelector;
    UINT32    operandPointerOffset;
    UINT32    operandPointerSelector;
    BYTE      data[SIZEOF_FPU_DATA];
    UINT32    status;
} EzFPUContext;

enum EzThreadHContextFlag {
    EzThreadHContextFlag_FPUInited    = 0x01,
    EzThreadHContextFlag_FPUUsed      = 0x02,
};

struct EzHALThreadContext {
    void Initialize();

    void Save();
    void Restore();

    void SaveFPU();
    void RestoreFPU();
};

//TODO:FPU implementation
inline void EzHALThreadContext::Initialize()
{
}

inline void EzHALThreadContext::Save()
{
}

inline void EzHALThreadContext::Restore()
{
}

inline void EzHALThreadContext::SaveFPU()
{
}

inline void EzHALThreadContext::RestoreFPU()
{
}

#endif //_EZX86PCHAL_H_