📄 intel奔腾系列cpu指令全集(包含p4).htm
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27 DAA Decimal adjust AL after addition
2F DAS Decimal adjust AL after subtraction
FE /1 DEC r/m8 Decrement r/m8 by 1
FF /1 DEC r/m16 Decrement r/m16 by 1
FF /1 DEC r/m32 Decrement r/m32 by 1
48+rw DEC r16 Decrement r16 by 1
48+rd DEC r32 Decrement r32 by 1
F6 /6 DIV r/m8 Unsigned divide AX by r/m8, with result stored
in AL ←Quotient, AH ←Remainder
F7 /6 DIV r/m16 Unsigned divide DX:AX by r/m16, with result stored
in AX ←Quotient, DX ←Remainder
F7 /6 DIV r/m32 Unsigned divide EDX:EAX by r/m32, with result stored
in EAX ←Quotient, EDX ←Remainder
66 0F 5E /r DIVPD xmm1, xmm2/m128 Divide packed double-precision floating-point values
in xmm1 by packed double-precision floating-point
values in xmm2/m128.
0F 5E /r DIVPS xmm1, xmm2/m128 Divide packed single-precision floating-point values
in xmm1 by packed single-precision floating-point
values in xmm2/m128.
F2 0F 5E /r DIVSD xmm1, xmm2/m64 Divide low double-precision floating-point value
in xmm1 by low double-precision floating-point
value in xmm2/mem64.
F3 0F 5E /r DIVSS xmm1, xmm2/m32 Divide low single-precision floating-point value
in xmm1 by low single-precision floating-point
value in xmm2/m32
0F 77 EMMS SET the x87 FPU tag word to empty.
C8 iw 00 ENTER imm16,0 Create a stack frame for a procedure
C8 iw 01 ENTER imm16,1 Create a nested stack frame for a procedure
C8 iw ib ENTER imm16,imm8 Create a nested stack frame for a procedure
D9 F0 F2XM1 REPlace ST(0) with (2^ST(0) 1)
D9 E1 FABS REPlace ST with its absolute value.
D8 /0 FADD m32fp Add m32fp to ST(0) and store result in ST(0)
DC /0 FADD m64fp Add m64fp to ST(0) and store result in ST(0)
D8 C0+i FADD ST(0), ST(i) Add ST(0) to ST(i) and store result in ST(0)
DC C0+i FADD ST(i), ST(0) Add ST(i) to ST(0) and store result in ST(i)
DE C0+i FADDP ST(i), ST(0) Add ST(0) to ST(i), store result in ST(i),
and pop the register stack
DE C1 FADDP Add ST(0) to ST(1), store result in ST(1),
and pop the register stack
DA /0 FIADD m32int Add m32int to ST(0) and store result in ST(0)
DE /0 FIADD m16int Add m16int to ST(0) and store result in ST(0)
DF /4 FBLD m80 dec Convert BCD value to floating-point and
push onto the FPU stack.
DF /6 FBSTP m80bcd Store ST(0) in m80bcd and pop ST(0).
D9 E0 FCHS Complements sign of ST(0)
9B DB E2 FCLEX Clear floating-point exception flags after checking
for pending unmasked floating-point exceptions.
DB E2 FNCLEX* Clear floating-point exception flags without checking
for pending unmasked floating-point exceptions.
DA C0+i FCMOVB ST(0), ST(i) Move if below (CF=1)
DA C8+i FCMOVE ST(0), ST(i) Move if equal (ZF=1)
DA D0+i FCMOVBE ST(0), ST(i) Move if below or equal (CF=1 or ZF=1)
DA D8+i FCMOVU ST(0), ST(i) Move if unordered (PF=1)
DB C0+i FCMOVNB ST(0), ST(i) Move if not below (CF=0)
DB C8+i FCMOVNE ST(0), ST(i) Move if not equal (ZF=0)
DB D0+i FCMOVNBE ST(0), ST(i) Move if not below or equal (CF=0 and ZF=0)
DB D8+i FCMOVNU ST(0), ST(i) Move if not unordered (PF=0)
D8 /2 FCOM m32fp Compare ST(0) with m32fp.
DC /2 FCOM m64fp Compare ST(0) with m64fp.
D8 D0+i FCOM ST(i) Compare ST(0) with ST(i).
D8 D1 FCOM Compare ST(0) with ST(1).
D8 /3 FCOMP m32fp Compare ST(0) with m32fp and pop register stack.
DC /3 FCOMP m64fp Compare ST(0) with m64fp and pop register stack.
D8 D8+i FCOMP ST(i) Compare ST(0) with ST(i) and pop register stack.
D8 D9 FCOMP Compare ST(0) with ST(1) and pop register stack.
DE D9 FCOMPP Compare ST(0) with ST(1) and
pop register stack twice.
DB F0+i FCOMI ST, ST(i) Compare ST(0) with ST(i) and
SET status flags accordingly
DF F0+i FCOMIP ST, ST(i) Compare ST(0) with ST(i), set status flags
accordingly, and pop register stack
DB E8+i FUCOMI ST, ST(i) Compare ST(0) with ST(i), check for ordered
values, and set status flags accordingly
DF E8+i FUCOMIP ST, ST(i) Compare ST(0) with ST(i), check for ordered values,
SET status flags accordingly, and pop register stack
D9 FF FCOS REPlace ST(0) with its cosine
D9 F6 FDECSTP Decrement TOP field in FPU status word.
D8 /6 FDIV m32fp Divide ST(0) by m32fp and store result in ST(0)
DC /6 FDIV m64fp Divide ST(0) by m64fp and store result in ST(0)
D8 F0+i FDIV ST(0), ST(i) Divide ST(0) by ST(i) and store result in ST(0)
DC F8+i FDIV ST(i), ST(0) Divide ST(i) by ST(0) and store result in ST(i)
DE F8+i FDIVP ST(i), ST(0) Divide ST(i) by ST(0), store result in ST(i),
and pop the register stack
DE F9 FDIVP Divide ST(1) by ST(0), store result in ST(1),
and pop the register stack
DA /6 FIDIV m32int Divide ST(0) by m32int and store result in ST(0)
DE /6 FIDIV m16int Divide ST(0) by m64int and store result in ST(0)
D8 /7 FDIVR m32fp Divide m32fp by ST(0) and store result in ST(0)
DC /7 FDIVR m64fp Divide m64fp by ST(0) and store result in ST(0)
D8 F8+i FDIVR ST(0), ST(i) Divide ST(i) by ST(0) and store result in ST(0)
DC F0+i FDIVR ST(i), ST(0) Divide ST(0) by ST(i) and store result in ST(i)
DE F0+i FDIVRP ST(i), ST(0) Divide ST(0) by ST(i), store result in ST(i),
and pop the register stack
DE F1 FDIVRP Divide ST(0) by ST(1), store result in ST(1),
and pop the register stack
DA /7 FIDIVR m32int Divide m32int by ST(0) and store result in ST(0)
DE /7 FIDIVR m16int Divide m16int by ST(0) and store result in ST(0)
DD C0+i FFREE ST(i) SETs tag for ST(i) to empty
DE /2 FICOM m16int Compare ST(0) with m16int
DA /2 FICOM m32int Compare ST(0) with m32int
DE /3 FICOMP m16int Compare ST(0) with m16int and pop stack register
DA /3 FICOMP m32int Compare ST(0) with m32int and pop stack register
DF /0 FILD m16int Push m16int onto the FPU register stack.
DB /0 FILD m32int Push m32int onto the FPU register stack.
DF /5 FILD m64int Push m64int onto the FPU register stack.
D9 F7 FINCSTP Increment the TOP field in the FPU status register
9B DB E3 FINIT Initialize FPU after checking for pending
unmasked floating-point exceptions.
DB E3 FNINIT* Initialize FPU without checking for pending
unmasked floating-point exceptions.
DF /2 FIST m16int Store ST(0) in m16int
DB /2 FIST m32int Store ST(0) in m32int
DF /3 FISTP m16int Store ST(0) in m16int and pop register stack
DB /3 FISTP m32int Store ST(0) in m32int and pop register stack
DF /7 FISTP m64int Store ST(0) in m64int and pop register stack
D9 /0 FLD m32fp Push m32fp onto the FPU register stack.
DD /0 FLD m64fp Push m64fp onto the FPU register stack.
DB /5 FLD m80fp Push m80fp onto the FPU register stack.
D9 C0+i FLD ST(i) Push ST(i) onto the FPU register stack.
D9 E8 FLD1 Push +1.0 onto the FPU register stack.
D9 E9 FLDL2T Push log2 10 onto the FPU register stack.
D9 EA FLDL2E Push log2 e onto the FPU register stack.
D9 EB FLDPI Push PI onto the FPU register stack.
D9 EC FLDLG2 Push log10 2 onto the FPU register stack.
D9 ED FLDLN2 Push loge 2 onto the FPU register stack.
D9 EE FLDZ Push +0.0 onto the FPU register stack.
D9 /5 FLDCW m2byte Load FPU control word from m2byte.
D9 /4 FLDENV m14/28byte Load FPU environment from m14byte or m28byte.
D8 /1 FMUL m32fp Multiply ST(0) by m32fp and store result in ST(0)
DC /1 FMUL m64fp Multiply ST(0) by m64fp and store result in ST(0)
D8 C8+i FMUL ST(0), ST(i) Multiply ST(0) by ST(i) and store result in ST(0)
DC C8+i FMUL ST(i), ST(0) Multiply ST(i) by ST(0) and store result in ST(i)
DE C8+i FMULP ST(i), ST(0) Multiply ST(i) by ST(0), store result in ST(i),
and pop the register stack
DE C9 FMULP Multiply ST(1) by ST(0), store result in ST(1),
and pop the register stack
DA /1 FIMUL m32int Multiply ST(0) by m32int and store result in ST(0)
DE /1 FIMUL m16int Multiply ST(0) by m16int and store result in ST(0)
D9 D0 FNOP No operation is performed.
D9 F3 FPATAN REPlace ST(1) with arctan(ST(1) ST(0)) and
pop the register stack
D9 F8 FPREM REPlace ST(0) with the remainder obtained
from dividing ST(0) by ST(1)
D9 F5 FPREM1 REPlace ST(0) with the IEEE remainder obtained
from dividing ST(0) by ST(1)
D9 F2 FPTAN REPlace ST(0) with its tangent and
push 1 onto the FPU stack.
D9 FC FRNDINT Round ST(0) to an integer.
DD /4 FRSTOR m94/108byte Load FPU state from m94byte or m108byte.
9B DD /6 FSAVE m94/108byte Store FPU state to m94byte or m108byte after checking
for pending unmasked floating-point exceptions.
Then re-initialize the FPU.
DD /6 FNSAVE* m94/108byte Store FPU environment to m94byte or m108byte without
checking for pending unmasked floating-point
exceptions. Then re-initialize the FPU.
D9 FD FSCALE Scale ST(0) by ST(1).
D9 FE FSIN REPlace ST(0) with its sine.
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