📄 feng2.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.1 06/12/2001
-- Compiled: 11/23/2004 17:29:14
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "feng2"
BEGIN
DEVICE = "EPM7128SLC84-15";
"clk" : INPUT_PIN = 83 ;
"c_out" : OUTPUT_PIN = 74 ; -- LC117
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC116 ;
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC124 ;
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node3" : LOCATION = LC125 ; -- PIN 79
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node4" : LOCATION = LC115 ; -- PIN 73
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node5" : LOCATION = LC114 ;
"|LPM_ADD_SUB:40|addcore:adder|addcore:adder0|result_node6" : LOCATION = LC113 ;
":4" : LOCATION = LC126 ; -- PIN 80 -- i6
":5" : LOCATION = LC123 ; -- PIN 77 -- i5
":6" : LOCATION = LC122 ; -- i4
":7" : LOCATION = LC121 ; -- i3
":8" : LOCATION = LC120 ; -- PIN 76 -- i2
":9" : LOCATION = LC119 ; -- i1
":10" : LOCATION = LC118 ; -- PIN 75 -- i0
END;
INTERNAL_INFO "feng2"
BEGIN
DEVICE = EPM7128SLC84-15;
LC117 : LORAX = "G110R0";
LC126 : LORAX = "G200R0,PA32R0C7";
LC123 : LORAX = "G144R0,PA18R0C7";
LC122 : LORAX = "G143R0,PA23R0C7";
LC121 : LORAX = "G142R0,PA19R0C7";
LC120 : LORAX = "G113R0,PA10R0C7";
LC119 : LORAX = "G112R0,PA12R0C7";
LC118 : LORAX = "G111R0,PA14R0C7";
LC116 : LORAX = "G56R0,PA1R0C7";
LC124 : LORAX = "G145R0,PA22R0C7";
LC125 : LORAX = "G199R0,PA28R0C7";
LC115 : LORAX = "G55R0,PA3R0C7";
LC114 : LORAX = "G54R0,PA5R0C7";
LC113 : LORAX = "G53R0,PA7R0C7";
END;
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