init_core.c

AMD的AU1200引导程序

/************************************************************************
 *
 *  init_core.c
 *
 *  Core card specific startup code (c-code)
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
 * documentation or other commercial items. If the user of this information, or 
 * any related documentation of any kind, including related technical data or 
 * manuals, is an agency, department, or other entity of the United States 
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 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
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 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
 * this information by the Government is further restricted in accordance with 
 * the terms of the license agreement(s) and/or applicable contract terms and 
 * conditions covering this information from MIPS Technologies or any 
 * contractually-authorized third party. 
 *
 ************************************************************************/


/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>
#include <syscon_api.h>
#include <sys_api.h>
#include <excep_api.h>
#include <product.h>
#include <atlas.h>
#include <malta.h>
#include <sead.h>
#include <gt64120.h>
#include <stdio.h>

/************************************************************************
 *  Definitions
 ************************************************************************/

/************************************************************************
 *  Public variables
 ************************************************************************/

/************************************************************************
 *  Static variables
 ************************************************************************/

static t_EXCEP_ref isr_ref;

/************************************************************************
 *  Static function prototypes
 ************************************************************************/

static void
gt64120_isr( 
    void *data );

/************************************************************************
 *  Implementation : Public functions
 ************************************************************************/


/************************************************************************
 *
 *                          arch_core_init
 *  Description :
 *  -------------
 *
 *  Core card specific initialisation code
 *
 *  Return values :
 *  ---------------
 *
 *  None
 *
 ************************************************************************/
void
arch_core_init( void )
{
#if 0
    switch( sys_platform )
    {
      case PRODUCT_ATLASA_ID :
      case PRODUCT_MALTA_ID :

        switch( sys_corecard )
        {
          case MIPS_REVISION_CORID_QED_RM5261 :
          case MIPS_REVISION_CORID_CORE_LV :

	    EXCEP_register_cpu_isr( 
	        (sys_platform == PRODUCT_ATLASA_ID) ?
		    ATLAS_INTLINE_64120 : MALTA_CPUINT_64120,
	        gt64120_isr,
		NULL,
		&isr_ref );

            /* Enable GT64120 interrupts */
            GT_W32( sys_nb_base, 
		    GT_CPUINT_MASK_OFS, 
			GT_CPUINT_MASK_MEMOUT_BIT    |
			GT_CPUINT_MASK_DMAOUT_BIT    |
			GT_CPUINT_MASK_CPUOUT_BIT    |
			GT_CPUINT_MASK_MASRDERR0_BIT |
			GT_CPUINT_MASK_SLVWRERR0_BIT |
			GT_CPUINT_MASK_MASWRERR0_BIT |	
			GT_CPUINT_MASK_SLVRDERR0_BIT |
			GT_CPUINT_MASK_ADDRERR0_BIT );

	    break;

	  /* Add new core cards here */

          default : /* Should never happen */
	    break;
    }

        break;

		
		case PRODUCT_PB1000_ID:
			/* PBUpdate - in arch core init.  */
			break;
      case PRODUCT_SEAD_ID  :
      case PRODUCT_SEAD2_ID :
      default :  /* Should never happen */ 
        break;
    }
#endif
}


/************************************************************************
 *  Implementation : Static functions
 ************************************************************************/

static void
gt64120_isr( 
    void *data )
{
    UINT32 cause, mask;

    GT_L32( sys_nb_base, GT_INTRCAUSE_OFS, cause );
    GT_L32( sys_nb_base, GT_CPUINT_MASK_OFS, mask );

    cause &= mask;

    if( cause )
    {
        printf( "\nGalileo 64120 Interrupt. Cause = 0x%08x\n", cause );
        while(1);
    }
    else
    {
        /*  On some old core cards, the were glitches on CoreHi.
	 *  If this happens, the system controller will indicate
	 *  that no interrupt has actually occurred. In this case,
	 *  we deregister gt64120_isr()
	 */

	switch( sys_platform )
	{
	  case PRODUCT_ATLASA_ID :
	    EXCEP_deregister_ic_isr( isr_ref );
	    break;
          case PRODUCT_MALTA_ID :
	    EXCEP_deregister_cpu_isr( isr_ref );
	    break;
	  default : /* Should not happen */
	    break;
	}
    }
}