lcd_init.c

在纯DOS下运行的TurboC3_ucos2_ucgui bug改进版本

/*
*********************************************************************************************************
* 文件: LCD_Init.C
* 描述: LCD 控制器服务文件.
* 编写: 深思 ([e-mail]).
*********************************************************************************************************
*/
#include "44b0x.h"
#include "LCDConf.h"
#include "LCD.h"

/*****************************************************************************************
* 定义 STN 显示数据区.
*****************************************************************************************/
U8  LCD_Buffer [LCD_XSIZE*LCD_YSIZE];

// 开/关 LCD 及背光.
#define  LCD_ON()        LCDCON1 = dLCDCON1 | 1; 	PDATC &= ~(1<<8);	PDATC &= ~(1<<9);
#define  LCD_OFF()       LCDCON1 = dLCDCON1 & (~1); PDATC |=  (1<<8);	PDATC |=  (1<<9);

// LCD control 1 register
#define CLKVAL          10          // determine the rate of VCLK. VCLK=MCLK/(CLKVAL*2) (CLKVAL >= 2).
#define WLH             3           // These bits determine the VLINE pulse's high level width by
                                    // counting the number of the system clock.
                                    // 00 = 4 clock, 01 = 8 clock, 10 = 12 clock, 11 = 16 clock
#define WDLY            3           // These bits determine the delay between VLINE and VCLK by
                                    // counting the number of the system clock
                                    // 00 = 4clock, 01 = 8 clock, 10 = 12 clock, 11 = 16 clock
#define MMODE           0           // This bit determines the toggle rate of the VM.
                                    // 0 = Each Frame, 1 = The rate defined by the MVAL
#define DISMODE         2           // These bits select the display mode.
                                    // 00 = 4-bit dual 01 = 4-bit single 10 = 8-bit single
#define INVCLK          0           // This bit controls the polarity of the VCLK active edge.
#define INVLINE         0           // This bit indicates the line pulse polarity.
#define INVFRAME        0           // This bit indicates the frame pulse polarity.
#define INVVD           0           // This bit indicates the video data(VD[7:0]) polarity.
#define ENVID           0           // LCD video output and the logic enable/disable.
#define dLCDCON1        ((CLKVAL<<12)|(WLH<<10)|(WDLY<<8)|(MMODE<<7)|(DISMODE<<5)|(INVCLK<<4)|(INVLINE<<3)|(INVFRAME<<2)|(INVVD<<1)|(ENVID))

// LCD control 2 register
#define LINEBLANK       10
#define HOZVAL          (LCD_XSIZE*3/8-1)
#define LINEVAL         (LCD_YSIZE-1)
#define dLCDCON2        ((LINEBLANK<<21)|(HOZVAL<<10)|LINEVAL)

// LCDCON3  Test Mode Enable Register
#define SELFREF         0           // LCD self refresh mode enable bit
#define dLCDCON3        SELFREF

// LCDSADDR1    Frame buffer start address 1 register
#define MODESEL         3           // 11 = color mode
#define LCDBANK         ((U32)LCD_Buffer>>22)             // These bits indicate A[27:22] of the bank location for the video buffer in the system memory.
#define LCDBASEU        (((U32)LCD_Buffer>>1)&0x1fffff)
#define dLCDSADDR1      ((MODESEL<<27)|(LCDBANK<<21)|LCDBASEU)

// LCDSADDR2     Frame buffer start address 2 register
#define BSWP            1           // Byte swap control bit
#define MVAL            13
#define LCDBASEL        ((((U32)LCD_Buffer+(LCD_XSIZE*LCD_YSIZE))>>1)&0x1fffff)
#define dLCDSADDR2      ((BSWP<<29)|(MVAL<<21)|LCDBASEL)

// LCDSADDR3    Virtual screen address set
#define OFFSIZE         0                   // Virtual screen offset size.
#define PAGEWIDTH       (LCD_XSIZE/2)       // Virtual screen page width.
#define dLCDSADDR3      ((OFFSIZE<<9)|PAGEWIDTH)

// REDLUT       Red lookup table register.
#define REDVAL          (((U32)15<<28)|(13<<24)|(11<<20)|(9<<16)|(6<<12)|(4<<8)|(2<<4)|(0<<0))
#define dREDLUT         REDVAL

// Green lookup table register
#define GREENVAL        (((U32)15<<28)|(13<<24)|(11<<20)|(9<<16)|(6<<12)|(4<<8)|(2<<4)|(0<<0))
#define dGREENLUT       GREENVAL

// Blue lookup table register
#define BLUEVAL         ((15<<12)|(11<<8)|(4<<4)|(0<<0))
#define dBLUELUT        BLUEVAL

// Dithering Mode Register.
#define dDITHMODE       0x12210

/*
********************************************************************************************************
* 函数: void s3c44b0x_LCD_Init (void).
* 描述: 初始化 LCD 控制器.
********************************************************************************************************
*/
void s3c44b0x_LCD_Init (void)
{
    LCD_OFF();
    DITHMODE  = dDITHMODE;
    DP1_2     = 0x0a5a5;
    DP4_7     = 0x0ba5da65;
    DP3_5     = 0x0a5a5f;
    DP2_3     = 0x0d6b;
    DP5_7     = 0x0eb7b5ed;
    DP3_4     = 0x07dbe;
    DP4_5     = 0x07ebdf;
    DP6_7     = 0x07fdfbfe;

    LCDCON1   = dLCDCON1;
    LCDCON2   = dLCDCON2;
    LCDCON3   = dLCDCON3;
    LCDSADDR1 = dLCDSADDR1;
    LCDSADDR2 = dLCDSADDR2;
    LCDSADDR3 = dLCDSADDR3;
    REDLUT    = dREDLUT;
    GREENLUT  = dGREENLUT;
    BLUELUT   = dBLUELUT;

    LCD_ON();
}

/*
********************************************************************************************************
* End.
********************************************************************************************************
*/