backtrack.v

viterbi译码器的一种fpga实现.是一个cs252 的project的result 供大家研究用

`include "defs.h"

module backtrack(cmp,  restart,  clk, 
             bit_line);

input   [64-1:0] cmp;
input   restart,  clk;
output  [7:0] bit_line;

wire    out0000,  out0001,  out0010,  out0011,  out0020,  out0021, 
 out0030,  out0031, 
                 out0100,  out0101,  out0110,  out0111,  out0120, 
 out0121,  out0130,  out0131, 
                 out0200,  out0201,  out0210,  out0211,  out0220, 
 out0221,  out0230,  out0231, 
                 out0300,  out0301,  out0310,  out0311,  out0320, 
 out0321,  out0330,  out0331, 
                 out0400,  out0401,  out0410,  out0411,  out0420, 
 out0421,  out0430,  out0431, 
                 out0500,  out0501,  out0510,  out0511,  out0520, 
 out0521,  out0530,  out0531, 
                 out0600,  out0601,  out0610,  out0611,  out0620, 
 out0621,  out0630,  out0631, 
                 out0700,  out0701,  out0710,  out0711,  out0720, 
 out0721,  out0730,  out0731, 
                 out0800,  out0801,  out0810,  out0811,  out0820, 
 out0821,  out0830,  out0831, 
                 out0900,  out0901,  out0910,  out0911,  out0920, 
 out0921,  out0930,  out0931, 
                 out1000,  out1001,  out1010,  out1011,  out1020, 
 out1021,  out1030,  out1031, 
                 out1100,  out1101,  out1110,  out1111,  out1120, 
 out1121,  out1130,  out1131, 
                 out1200,  out1201,  out1210,  out1211,  out1220, 
 out1221,  out1230,  out1231, 
                 out1300,  out1301,  out1310,  out1311,  out1320, 
 out1321,  out1330,  out1331, 
                 out1400,  out1401,  out1410,  out1411,  out1420, 
 out1421,  out1430,  out1431, 
                 out1500,  out1501,  out1510,  out1511,  out1520, 
 out1521,  out1530,  out1531;

reg    [7:0]last_out;
always @(posedge clk) last_out = {out1500,  out1501,  out1510, 
 out1511,  out1520,  out1521,  out1530,  out1531};
reg del_restart;
always @(posedge clk) del_restart = restart;
wire   [7:0]first_in = del_restart == 1 ? {1'b1,  1'b0,  1'b0, 
 1'b0,  1'b0,  1'b0,  1'b0,  1'b0} : last_out;

MS_res_stage  st0(cmp[3:0],  bit_line[0], 
         out1500,  out1511,  out1530,  out1521,  out1510,  out1501, 
 out1520,  out1531, 
         out0000,  out0001,  out0010,  out0011,  out0020,  out0021, 
 out0030,  out0031);
MS_res_stage  st1(cmp[7:4],  bit_line[1], 
         out0000,  out0011,  out0030,  out0021,  out0010,  out0001, 
 out0020,  out0031, 
         out0100,  out0101,  out0110,  out0111,  out0120,  out0121, 
 out0130,  out0131);
MS_res_stage  st2(cmp[11:8],  bit_line[2], 
         out0100,  out0111,  out0130,  out0121,  out0110,  out0101, 
 out0120,  out0131, 
         out0200,  out0201,  out0210,  out0211,  out0220,  out0221, 
 out0230,  out0231);
MS_res_stage  st3(cmp[15:12],  bit_line[3], 
         out0200,  out0211,  out0230,  out0221,  out0210,  out0201, 
 out0220,  out0231, 
         out0300,  out0301,  out0310,  out0311,  out0320,  out0321, 
 out0330,  out0331);
MS_res_stage  st4(cmp[19:16],  bit_line[4], 
         out0300,  out0311,  out0330,  out0321,  out0310,  out0301, 
 out0320,  out0331, 
         out0400,  out0401,  out0410,  out0411,  out0420,  out0421, 
 out0430,  out0431);
MS_res_stage  st5(cmp[23:20],  bit_line[5], 
         out0400,  out0411,  out0430,  out0421,  out0410,  out0401, 
 out0420,  out0431, 
         out0500,  out0501,  out0510,  out0511,  out0520,  out0521, 
 out0530,  out0531);
MS_res_stage  st6(cmp[27:24],  bit_line[6], 
         out0500,  out0511,  out0530,  out0521,  out0510,  out0501, 
 out0520,  out0531, 
         out0600,  out0601,  out0610,  out0611,  out0620,  out0621, 
 out0630,  out0631);
MS_res_stage  st7(cmp[31:28],  bit_line[7], 
         out0600,  out0611,  out0630,  out0621,  out0610,  out0601, 
 out0620,  out0631, 
         out0700,  out0701,  out0710,  out0711,  out0720,  out0721, 
 out0730,  out0731);
res_stage  st8(cmp[35:32],  
         out0700,  out0711,  out0730,  out0721,  out0710,  out0701, 
 out0720,  out0731, 
         out0800,  out0801,  out0810,  out0811,  out0820,  out0821, 
 out0830,  out0831);
res_stage  st9(cmp[39:36],  
         out0800,  out0811,  out0830,  out0821,  out0810,  out0801, 
 out0820,  out0831, 
         out0900,  out0901,  out0910,  out0911,  out0920,  out0921, 
 out0930,  out0931);
res_stage  st10(cmp[43:40],  
         out0900,  out0911,  out0930,  out0921,  out0910,  out0901, 
 out0920,  out0931, 
         out1000,  out1001,  out1010,  out1011,  out1020,  out1021, 
 out1030,  out1031);
res_stage  st11(cmp[47:44],  
         out1000,  out1011,  out1030,  out1021,  out1010,  out1001, 
 out1020,  out1031, 
         out1100,  out1101,  out1110,  out1111,  out1120,  out1121, 
 out1130,  out1131);
res_stage  st12(cmp[51:48],  
         out1100,  out1111,  out1130,  out1121,  out1110,  out1101, 
 out1120,  out1131, 
         out1200,  out1201,  out1210,  out1211,  out1220,  out1221, 
 out1230,  out1231);
res_stage  st13(cmp[55:52],  
         out1200,  out1211,  out1230,  out1221,  out1210,  out1201, 
 out1220,  out1231, 
         out1300,  out1301,  out1310,  out1311,  out1320,  out1321, 
 out1330,  out1331);
res_stage  st14(cmp[59:56],  
         out1300,  out1311,  out1330,  out1321,  out1310,  out1301, 
 out1320,  out1331, 
         out1400,  out1401,  out1410,  out1411,  out1420,  out1421, 
 out1430,  out1431);
res_stage  st15(cmp[63:60],  
         out1400,  out1411,  out1430,  out1421,  out1410,  out1401, 
 out1420,  out1431, 
         first_in[7],  first_in[6],  first_in[5],  first_in[4], 
 first_in[3],  first_in[2],  first_in[1],  first_in[0]);

endmodule