myproject.pld

这是一个计数器原理图

/*************************************************************************************/
/* PLD99: Schematic to CUPL translator                                               */
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/*  Translated at 22:56:41                                                           */
/*             on 2006-3-5                                                           */
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NAME     MyProject;
DATE     2006-3-5;
PARTNO   ;
REVISION ;
DESIGNER ;
COMPANY  ;
ASSEMBLY ;
LOCATION ;
DEVICE   xc9536pc44;
/*************************************************************************************/
/*  All Parts Connected                                                              */
/*    - [SR4CLED,U1]                                                                 */
/*    - [OR2B2,U2]                                                                   */
/*    - [INV,U3]                                                                     */
/*    - [INV,U4]                                                                     */
/*    - [INV,U5]                                                                     */
/*    - [INV,U6]                                                                     */
/*    - [INV,U7]                                                                     */
/*    - [FJKC,U8]                                                                    */
/*    - [FJKC,U9]                                                                    */
/*************************************************************************************/


/*************************************************************************************/
/*  Input and Output Pin Declarations                                                */
/*************************************************************************************/
PINNODE =  NetU1_CE;/* Buried node */
/* Netname = (NetU1_CE) */

PINNODE =  NetU1_LEFT;/* Buried node */
/* Netname = (NetU1_LEFT) */

PINNODE =  Q3;/* Buried node */
/* Netname = (Q3) */

PINNODE =  Q2;/* Buried node */
/* Netname = (Q2) */

PINNODE =  Q1;/* Buried node */
/* Netname = (Q1) */

PINNODE =  Q0;/* Buried node */
/* Netname = (Q0) */

/*************************************************************************************/


/*************************************************************************************/
/*  Logic Equations                                                                  */
/*************************************************************************************/
Q0. d  = NetU1_SLI & !NetU1_L & NetU1_LEFT & NetU1_CE # Q1 & !NetU1_L & !NetU1_LEFT & 
         NetU1_CE # Q0 & !NetU1_L & !NetU1_CE # GND & NetU1_L;
/* Part = (U1)  */
Q1. d  = Q0 & !NetU1_L & NetU1_LEFT & NetU1_CE # Q2 & !NetU1_L & !NetU1_LEFT & NetU1_CE # 
         Q1 & !NetU1_L & !NetU1_CE # GND & NetU1_L;
/* Part = (U1)  */
Q2. d  = Q1 & !NetU1_L & NetU1_LEFT & NetU1_CE # Q3 & !NetU1_L & !NetU1_LEFT & NetU1_CE # 
         Q2 & !NetU1_L & !NetU1_CE # GND & NetU1_L;
/* Part = (U1)  */
Q3. d  = Q2 & !NetU1_L & NetU1_LEFT & NetU1_CE # NetU1_SRI & !NetU1_L & !NetU1_LEFT & 
         NetU1_CE # Q3 & !NetU1_L & !NetU1_CE # GND & NetU1_L;
/* Part = (U1)  */
[Q0,Q1,Q2,Q3]. ck  = NetU1_C;
/* Part = (U1)  */
[Q0,Q1,Q2,Q3]. ar  = GND;
/* Part = (U1)  */
NetU2_O = !NetU2_I1 # !NetU2_I0;
/* Part = (U2)  */
NetU1_SLI = !Q3;
/* Part = (U3)  */
NetU1_SRI = !Q0;
/* Part = (U4)  */
NetU5_O = !NetU5_I;
/* Part = (U5)  */
NetU6_O = !NetU2_I0;
/* Part = (U6)  */
NetU7_O = !NetU2_I1;
/* Part = (U7)  */
NetU1_CE. ck  = NetU1_C;
/* Part = (U8)  */
NetU1_CE. j  = NetU2_O;
/* Part = (U8)  */
NetU1_CE. k  = NetU5_O;
/* Part = (U8)  */
NetU1_CE. ar  = GND;
/* Part = (U8)  */
NetU1_LEFT. ck  = NetU1_C;
/* Part = (U9)  */
NetU1_LEFT. j  = NetU6_O;
/* Part = (U9)  */
NetU1_LEFT. k  = NetU7_O;
/* Part = (U9)  */
NetU1_LEFT. ar  = GND;
/* Part = (U9)  */
/*************************************************************************************/