📄 hal_arch.h
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#define HAL_BREAKINST_THUMB_SIZE 2#ifdef __thumb__# define HAL_BREAKPOINT(_label_) \asm volatile (" .code 16;" \ " .globl " #_label_ ";" \ #_label_":" \ " .short " _stringify(HAL_BREAKINST_THUMB) \ );# define HAL_BREAKINST HAL_BREAKINST_THUMB# define HAL_BREAKINST_SIZE HAL_BREAKINST_THUMB_SIZE# define HAL_BREAKINST_TYPE cyg_uint16#else // __thumb__#define HAL_BREAKPOINT(_label_) \asm volatile (" .globl " #_label_ ";" \ #_label_":" \ " .word " _stringify(HAL_BREAKINST_ARM) \ );//#define HAL_BREAKINST {0xFE, 0xDE, 0xFF, 0xE7}#define HAL_BREAKINST HAL_BREAKINST_ARM#define HAL_BREAKINST_SIZE HAL_BREAKINST_ARM_SIZE#define HAL_BREAKINST_TYPE cyg_uint32#endif // __thumb__extern cyg_uint32 __arm_breakinst;extern cyg_uint16 __thumb_breakinst;#define HAL_BREAKINST_ADDR(x) (((x)==2)? \ ((void*)&__thumb_breakinst) : \ ((void*)&__arm_breakinst))//--------------------------------------------------------------------------// Thread register state manipulation for GDB support.// GDB expects the registers in this structure:// r0..r10, fp, ip, sp, lr, pc - 4 bytes each// f0..f7 - 12 bytes each (N/A on ARM7)// fps - 4 bytes (N/A on ARM7)// ps - 4 bytes// Translate a stack pointer as saved by the thread context macros above into// a pointer to a HAL_SavedRegisters structure.#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \ (_regs_) = (HAL_SavedRegisters *)(_sp_)// Copy a set of registers from a HAL_SavedRegisters structure into a// GDB ordered array. #define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \ CYG_MACRO_START \ CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ int _i_; \ \ for( _i_ = 0; _i_ <= 10; _i_++ ) \ _regval_[_i_] = (_regs_)->d[_i_]; \ \ _regval_[11] = (_regs_)->fp; \ _regval_[12] = (_regs_)->ip; \ _regval_[13] = (_regs_)->sp; \ _regval_[14] = (_regs_)->lr; \ _regval_[15] = (_regs_)->pc; \ _regval_[25] = (_regs_)->cpsr; \ for( _i_ = 0; _i_ < 8; _i_++ ) \ _regval_[_i_+16] = 0; \ CYG_MACRO_END// Copy a GDB ordered array into a HAL_SavedRegisters structure.#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \ CYG_MACRO_START \ CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \ int _i_; \ \ for( _i_ = 0; _i_ <= 10; _i_++ ) \ (_regs_)->d[_i_] = _regval_[_i_]; \ \ (_regs_)->fp = _regval_[11]; \ (_regs_)->ip = _regval_[12]; \ (_regs_)->sp = _regval_[13]; \ (_regs_)->lr = _regval_[14]; \ (_regs_)->pc = _regval_[15]; \ (_regs_)->cpsr = _regval_[25]; \ CYG_MACRO_END//--------------------------------------------------------------------------// HAL setjmp#define CYGARC_JMP_BUF_SIZE 16 // Actually 11, but some room left overtypedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];externC int hal_setjmp(hal_jmp_buf env);externC void hal_longjmp(hal_jmp_buf env, int val);//--------------------------------------------------------------------------// Idle thread code.// This macro is called in the idle thread loop, and gives the HAL the// chance to insert code. Typical idle thread behaviour might be to halt the// processor.externC void hal_idle_thread_action(cyg_uint32 loop_count);#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)//---------------------------------------------------------------------------// Table definition macros.// The ARM assembler has a slightly different syntax for some of this, so// we have to define alternatives here.// Note that the __string() and __xstring() macros used here are defined in// hal_tables.h.#ifndef CYG_HAL_TABLE_BEGIN#define CYG_HAL_TABLE_BEGIN( _label, _name ) \__asm__(".section \"" __string(.ecos.table.##_name##.begin) "\",\"aw\"\n" \ ".globl " __xstring(CYG_LABEL_DEFN(_label)) "\n" \ ".type " __xstring(CYG_LABEL_DEFN(_label)) ",object\n" \ ".p2align 2\n" \__xstring(CYG_LABEL_DEFN(_label)) ":\n" \ ".previous\n" \ )#endif#ifndef CYG_HAL_TABLE_END#define CYG_HAL_TABLE_END( _label, _name ) \__asm__(".section \"" __string(.ecos.table.##_name##.finish) "\",\"aw\"\n" \ ".globl " __xstring(CYG_LABEL_DEFN(_label)) "\n" \ ".type " __xstring(CYG_LABEL_DEFN(_label)) ",object\n" \ ".p2align 2\n" \__xstring(CYG_LABEL_DEFN(_label)) ":\n" \ ".previous\n" \ )#endif//---------------------------------------------------------------------------// Minimal and sensible stack sizes: the intention is that applications// will use these to provide a stack size in the first instance prior to// proper analysis. Idle thread stack should be this big.// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!// This is not a config option because it should not be adjusted except// under "enough rope" sort of disclaimers.// A minimal, optimized stack frame, rounded up - no autos#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 20)// Stack needed for a context switch: this is implicit in the estimate for// interrupts so not explicitly used below:#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 20)// Interrupt + call to ISR, interrupt_end() and the DSR#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \ ((4 * 20) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)// Space for the maximum number of nested interrupts, plus room to call functions#define CYGNUM_HAL_MAX_INTERRUPT_NESTING 4#define CYGNUM_HAL_STACK_SIZE_MINIMUM \ (CYGNUM_HAL_MAX_INTERRUPT_NESTING * CYGNUM_HAL_STACK_INTERRUPT_SIZE + \ 2 * CYGNUM_HAL_STACK_FRAME_SIZE)#define CYGNUM_HAL_STACK_SIZE_TYPICAL \ (CYGNUM_HAL_STACK_SIZE_MINIMUM + \ 16 * CYGNUM_HAL_STACK_FRAME_SIZE)//--------------------------------------------------------------------------// Macros for switching context between two eCos instances (jump from// code in ROM to code in RAM or vice versa).#define CYGARC_HAL_SAVE_GP()#define CYGARC_HAL_RESTORE_GP()//-----------------------------------------------------------------------------#endif // CYGONCE_HAL_ARCH_H// End of hal_arch.h
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