mlt_arm_sitsang_ram.ldi

来自「移植到WLIT项目的redboot源代码」· LDI 代码 · 共 30 行

// eCos memory layout - Tue Sep 05 16:58:21 2000

// This is a generated file - do not edit

#include <cyg/infra/cyg_type.inc>

MEMORY
{
    vrom : ORIGIN = 0x00000000, LENGTH = 0x1000
    ram  : ORIGIN = 0xA0000000, LENGTH = 0x2000000
}

SECTIONS
{
    SECTIONS_BEGIN
    SECTION_fixed_vectors (vrom, 0x20, LMA_EQ_VMA)  // virtual ROM addr, but really in physical ram
    SECTION_rom_vectors (ram, 0xa0020000, LMA_EQ_VMA)
    SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
//    CYG_LABEL_DEFN(__pci_window) = 0xf00000; . = CYG_LABEL_DEFN(__pci_window) + 0x100000;
    SECTIONS_END
}