sitsang_cotulla.def.s

移植到WLIT项目的redboot源代码

;//	Copyright (C) 2002.  Intel Corporation.                        
;//*****************************************
;// * Sitsang register location definitions *
;// *****************************************/
;// Date:  August 28, 2002
;// Purpose:  Describes all registers mapped in Sitsang 
;// File:     sitsang_cotulla_def.s
;


;//******************
;// * Sitsang Devices *
;// ******************/

        MACRO
        def        $s, $v
        GBLA        $s
$s        SETA        $v
        MEND


     def BOOT_ROM,       0x00000000    ; //* Boot ROM (Flash) */
     def APP_FLASH,      0x00100000    ; //* Application Flash */
     def SITSANG_REGS,   0x08000000    ; //* Sitsang Registers */
     def SDRAM_B0,       0xA0000000    ; //* 64 MByte of SDRAM Bank 0 */
     def ETHER_CONTR,    0x04000000    ; //* Ethernet Controller IO Base address */

     def BOOTFLASHSIZE,  0x00100000      ;// BOOT FLASH - 1 Mbytes
.ifdef SITSANG_FLASH_SINGLE_BANK
     def APPFLASHSIZE,   0x01f00000      ;// APPLICATION FLASH - 31 Mbytes
.else
     def APPFLASHSIZE,   0x03f00000      ;// APPLICATION FLASH - 63 Mbytes
.endif
     def SDRAMBANK0SIZE, 0x4000000     ;// SDRAM bank 1 - 64 Mbytes



;//**********************
;// * Board Level Registers *
;// **********************/
      def PCR_RW,         0x08000000    ;Power control register
      def BCR_RW,         0X08000004    ;Board control register
      def BSR_RD,         0x08000008    ;Board status register
      def BIPR_RW,        0x0800000C    ;Board interrupt pending register
      def BIMR_RW,        0x08000010    ;Board interrupt mask register
      def AXHR_RD,        0x08000014
      def AXLR_RD,        0x08000018
      def AXHR_RD,        0x0800001C
      def JSSR_RD,        0x08000020
      def LLEDR_RW,	  0x08000024
      def HLEDR_RW,	  0x08000028
      def EXBCR_RW,	  0x0800002C
      def EXBSR_RD,	  0x08000030
      def EXBIPR_RW,	  0x08000034
      def EXBIMR_RW,	  0x08000038
     END