gyromousev1_2.lst

陀螺仪程序

(0101) 	mov	reg[85h], 00h		;ADCINC_1_AtoD1cr1(ASD11CR1)
    02B8: 62 85 00 MOV   REG[133],0
(0102) 	mov	reg[86h], 20h		;ADCINC_1_AtoD1cr2(ASD11CR2)
    02BB: 62 86 20 MOV   REG[134],32
(0103) 	mov	reg[87h], f8h		;ADCINC_1_AtoD1cr3(ASD11CR3)
    02BE: 62 87 F8 MOV   REG[135],248
(0104) ;       Instance name ADCINC_1, Block Name ADC2(ASC21)
(0105) 	mov	reg[94h], 90h		;ADCINC_1_AtoD2cr0(ASC21CR0)
    02C1: 62 94 90 MOV   REG[148],144
(0106) 	mov	reg[95h], 00h		;ADCINC_1_AtoD2cr1(ASC21CR1)
    02C4: 62 95 00 MOV   REG[149],0
(0107) 	mov	reg[96h], 60h		;ADCINC_1_AtoD2cr2(ASC21CR2)
    02C7: 62 96 60 MOV   REG[150],96
(0108) 	mov	reg[97h], f0h		;ADCINC_1_AtoD2cr3(ASC21CR3)
    02CA: 62 97 F0 MOV   REG[151],240
(0109) ;       Instance name ADCINC_1, Block Name PWM(DBB00)
(0110) 	mov	reg[23h], 00h		;ADCINC_1_PWMcr0(DBB00CR0)
    02CD: 62 23 00 MOV   REG[35],0
(0111) 	mov	reg[21h], 00h		;ADCINC_1_PWMdr1(DBB00DR1)
    02D0: 62 21 00 MOV   REG[33],0
(0112) 	mov	reg[22h], 01h		;ADCINC_1_PWMdr2(DBB00DR2)
    02D3: 62 22 01 MOV   REG[34],1
(0113) ;  Instance name PGA_1, User Module PGA
(0114) ;       Instance name PGA_1, Block Name GAIN(ACB01)
(0115) 	mov	reg[75h], fdh		;PGA_1_GAIN_CR0(ACB01CR0)
    02D6: 62 75 FD MOV   REG[117],253
(0116) 	mov	reg[76h], 21h		;PGA_1_GAIN_CR1(ACB01CR1)
    02D9: 62 76 21 MOV   REG[118],33
(0117) 	mov	reg[77h], 20h		;PGA_1_GAIN_CR2(ACB01CR2)
    02DC: 62 77 20 MOV   REG[119],32
(0118) 	mov	reg[74h], 00h		;PGA_1_GAIN_CR3(ACB01CR3)
    02DF: 62 74 00 MOV   REG[116],0
(0119) ;  Instance name UART_1, User Module UART
(0120) ;       Instance name UART_1, Block Name RX(DCB03)
(0121) 	mov	reg[2fh], 00h		;UART_1_RX_CONTROL_REG(DCB03CR0)
    02E2: 62 2F 00 MOV   REG[47],0
(0122) 	mov	reg[2dh], 00h		;UART_1_(DCB03DR1)
    02E5: 62 2D 00 MOV   REG[45],0
(0123) 	mov	reg[2eh], 00h		;UART_1_RX_BUFFER_REG (DCB03DR2)
    02E8: 62 2E 00 MOV   REG[46],0
(0124) ;       Instance name UART_1, Block Name TX(DCB02)
(0125) 	mov	reg[2bh], 00h		;UART_1_TX_CONTROL_REG(DCB02CR0)
    02EB: 62 2B 00 MOV   REG[43],0
(0126) 	mov	reg[29h], 00h		;UART_1_TX_BUFFER_REG (DCB02DR1)
    02EE: 62 29 00 MOV   REG[41],0
(0127) 	mov	reg[2ah], 00h		;UART_1_(DCB02DR2)
    02F1: 62 2A 00 MOV   REG[42],0
(0128) 	M8C_SetBank1
    02F4: 71 10    OR    F,16
(0129) ;  Global Register values
(0130) 	mov	reg[61h], 00h		; AnalogClockSelect1 register (CLK_CR1)
    02F6: 62 61 00 MOV   REG[97],0
(0131) 	mov	reg[69h], 00h		; AnalogClockSelect2 register (CLK_CR2)
    02F9: 62 69 00 MOV   REG[105],0
(0132) 	mov	reg[60h], 00h		; AnalogColumnClockSelect register (CLK_CR0)
    02FC: 62 60 00 MOV   REG[96],0
(0133) 	mov	reg[62h], 00h		; AnalogIOControl_0 register (ABF_CR0)
    02FF: 62 62 00 MOV   REG[98],0
(0134) 	mov	reg[67h], 33h		; AnalogLUTControl0 register (ALT_CR0)
    0302: 62 67 33 MOV   REG[103],51
(0135) 	mov	reg[68h], 33h		; AnalogLUTControl1 register (ALT_CR1)
    0305: 62 68 33 MOV   REG[104],51
(0136) 	mov	reg[63h], 00h		; AnalogModulatorControl_0 register (AMD_CR0)
    0308: 62 63 00 MOV   REG[99],0
(0137) 	mov	reg[66h], 00h		; AnalogModulatorControl_1 register (AMD_CR1)
    030B: 62 66 00 MOV   REG[102],0
(0138) 	mov	reg[d1h], 00h		; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
    030E: 62 D1 00 MOV   REG[209],0
(0139) 	mov	reg[d3h], 00h		; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
    0311: 62 D3 00 MOV   REG[211],0
(0140) 	mov	reg[d0h], 00h		; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
    0314: 62 D0 00 MOV   REG[208],0
(0141) 	mov	reg[d2h], 00h		; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
    0317: 62 D2 00 MOV   REG[210],0
(0142) 	mov	reg[e1h], 20h		; OscillatorControl_1 register (OSC_CR1)
    031A: 62 E1 20 MOV   REG[225],32
(0143) 	mov	reg[e2h], 00h		; OscillatorControl_2 register (OSC_CR2)
    031D: 62 E2 00 MOV   REG[226],0
(0144) 	mov	reg[dfh], 33h		; OscillatorControl_3 register (OSC_CR3)
    0320: 62 DF 33 MOV   REG[223],51
(0145) 	mov	reg[deh], 00h		; OscillatorControl_4 register (OSC_CR4)
    0323: 62 DE 00 MOV   REG[222],0
(0146) 	mov	reg[ddh], 00h		; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
    0326: 62 DD 00 MOV   REG[221],0
(0147) ;  Instance name ADCINC_1, User Module ADCINC
(0148) ;       Instance name ADCINC_1, Block Name ADC1(ASD11)
(0149) ;       Instance name ADCINC_1, Block Name ADC2(ASC21)
(0150) ;       Instance name ADCINC_1, Block Name PWM(DBB00)
(0151) 	mov	reg[20h], 31h		;ADCINC_1_PWMfn(DBB00FN)
    0329: 62 20 31 MOV   REG[32],49
(0152) 	mov	reg[21h], 15h		;ADCINC_1_PWMsl(DBB00IN)
    032C: 62 21 15 MOV   REG[33],21
(0153) 	mov	reg[22h], 40h		;ADCINC_1_PWMos(DBB00OU)
    032F: 62 22 40 MOV   REG[34],64
(0154) ;  Instance name PGA_1, User Module PGA
(0155) ;       Instance name PGA_1, Block Name GAIN(ACB01)
(0156) ;  Instance name UART_1, User Module UART
(0157) ;       Instance name UART_1, Block Name RX(DCB03)
(0158) 	mov	reg[2ch], 05h		;UART_1_RX_FUNC_REG   (DCB03FN)
    0332: 62 2C 05 MOV   REG[44],5
(0159) 	mov	reg[2dh], 01h		;UART_1_RX_INPUT_REG  (DCB03IN)
    0335: 62 2D 01 MOV   REG[45],1
(0160) 	mov	reg[2eh], 40h		;UART_1_RX_OUTPUT_REG (DCB03OU)
    0338: 62 2E 40 MOV   REG[46],64
(0161) ;       Instance name UART_1, Block Name TX(DCB02)
(0162) 	mov	reg[28h], 1dh		;UART_1_TX_FUNC_REG   (DCB02FN)
    033B: 62 28 1D MOV   REG[40],29
(0163) 	mov	reg[29h], 01h		;UART_1_TX_INPUT_REG  (DCB02IN)
    033E: 62 29 01 MOV   REG[41],1
(0164) 	mov	reg[2ah], 44h		;UART_1_TX_OUTPUT_REG (DCB02OU)
    0341: 62 2A 44 MOV   REG[42],68
(0165) 	M8C_SetBank0
    0344: 70 EF    AND   F,239
(0166) 	ret
    0346: 7F       RET   
FILE: lib\psocconfig.asm
(0001) ; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0002) ;
(0003) ;==========================================================================
(0004) ;  PSoCConfig.asm
(0005) ;  @PSOC_VERSION
(0006) ;
(0007) ;  Version: 0.85
(0008) ;  Revised: June 22, 2004
(0009) ;  Copyright Cypress MicroSystems 2000-2004. All Rights Reserved.
(0010) ;
(0011) ;  This file is generated by the Device Editor on Application Generation.
(0012) ;  It contains code which loads the configuration data table generated in
(0013) ;  the file PSoCConfigTBL.asm
(0014) ;
(0015) ;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
(0016) ;  Edits to this file will not be preserved.
(0017) ;==========================================================================
(0018) ;
(0019) include "m8c.inc"
(0020) include "memory.inc"
(0021) include "GlobalParams.inc"
(0022) 
(0023) export LoadConfigInit
(0024) export _LoadConfigInit
(0025) export LoadConfig_gyromousev1_2
(0026) export _LoadConfig_gyromousev1_2
(0027) 
(0028) export NO_SHADOW
(0029) export _NO_SHADOW
(0030) 
(0031) FLAG_CFG_MASK:      equ 10h         ;M8C flag register REG address bit mask
(0032) END_CONFIG_TABLE:   equ ffh         ;end of config table indicator
(0033) 
(0034) AREA psoc_config(rom, rel)
(0035) 
(0036) 
(0037) ;---------------------------------------------------------------------------
(0038) ; LoadConfigInit - Establish the start-up configuration (except for a few
(0039) ;                  parameters handled by boot code, like CPU speed). This
(0040) ;                  function can be called from user code, but typically it
(0041) ;                  is only called from boot.
(0042) ;
(0043) ;       INPUTS: None.
(0044) ;      RETURNS: Nothing.
(0045) ; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
(0046) ;               In the large memory model currently only the page
(0047) ;               pointer registers listed below are modified.  This does
(0048) ;               not guarantee that in future implementations of this
(0049) ;               function other page pointer registers will not be
(0050) ;               modified.
(0051) ;          
(0052) ;               Page Pointer Registers Modified: 
(0053) ;               CUR_PP
(0054) ;
(0055) _LoadConfigInit:
(0056)  LoadConfigInit:
(0057)     RAM_PROLOGUE RAM_USE_CLASS_4
(0058)     
(0059) 	lcall	LoadConfig_gyromousev1_2
    0347: 7C 03 4B LCALL 0x034B
(0060) 
(0061)     RAM_EPILOGUE RAM_USE_CLASS_4
(0062)     ret
    034A: 7F       RET   
(0063) 
(0064) ;---------------------------------------------------------------------------
(0065) ; Load Configuration gyromousev1_2
(0066) ;
(0067) ;    Load configuration registers for gyromousev1_2.
(0068) ;    IO Bank 0 registers a loaded first,then those in IO Bank 1.
(0069) ;
(0070) ;       INPUTS: None.
(0071) ;      RETURNS: Nothing.
(0072) ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be
(0073) ;               modified as may the Page Pointer registers!
(0074) ;               In the large memory model currently only the page
(0075) ;               pointer registers listed below are modified.  This does
(0076) ;               not guarantee that in future implementations of this
(0077) ;               function other page pointer registers will not be
(0078) ;               modified.
(0079) ;          
(0080) ;               Page Pointer Registers Modified: 
(0081) ;               CUR_PP
(0082) ;
(0083) _LoadConfig_gyromousev1_2:
(0084)  LoadConfig_gyromousev1_2:
(0085)     RAM_PROLOGUE RAM_USE_CLASS_4
(0086)     lcall   LoadConfigTBL_gyromousev1_2            ; Call load config table routine
    034B: 7C 01 C6 LCALL 0x01C6
(0087) 
(0088) 
(0089)     RAM_EPILOGUE RAM_USE_CLASS_4
(0090)     ret
    034E: 7F       RET   
FILE: lib\uart_1int.asm
(0001) ;;*****************************************************************************
(0002) ;;*****************************************************************************
(0003) ;;  FILENAME:   UART_1INT.asm
(0004) ;;  Version: 5.2, Updated on 2005/09/30 at 16:26:37
(0005) ;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0006) ;;
(0007) ;;  DESCRIPTION:  UART Interrupt Service Routine.
(0008) ;;-----------------------------------------------------------------------------
(0009) ;;  Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
(0010) ;;*****************************************************************************
(0011) ;;*****************************************************************************
(0012) 
(0013) 
(0014) include "UART_1.inc"
(0015) include "memory.inc"
(0016) include "m8c.inc"
(0017) 
(0018) ;-----------------------------------------------
(0019) ;  Global Symbols
(0020) ;-----------------------------------------------
(0021) export  _UART_1_TX_ISR
(0022) export  _UART_1_RX_ISR
(0023) 
(0024) IF (UART_1_RXBUF_ENABLE)
(0025) export  UART_1_aRxBuffer
(0026) export _UART_1_aRxBuffer
(0027) export  UART_1_bRxCnt
(0028) export _UART_1_bRxCnt
(0029) export  UART_1_fStatus
(0030) export _UART_1_fStatus
(0031) ENDIF
(0032) 
(0033) 
(0034) ;-----------------------------------------------
(0035) ; Variable Allocation
(0036) ;-----------------------------------------------
(0037) AREA InterruptRAM (RAM, REL, CON)
(0038) 
(0039) IF (UART_1_RXBUF_ENABLE)
(0040)  UART_1_fStatus:
(0041) _UART_1_fStatus:      BLK  1
(0042)  UART_1_bRxCnt:
(0043) _UART_1_bRxCnt:       BLK  1
(0044) AREA UART_1_RAM (RAM, REL, CON)
(0045)  UART_1_aRxBuffer:
(0046) _UART_1_aRxBuffer:    BLK UART_1_RX_BUFFER_SIZE
(0047) ENDIF
(0048) 
(0049) AREA InterruptRAM (RAM, REL, CON)
(0050) 
(0051) ;@PSoC_UserCode_INIT@ (Do not change this line.)
(0052) ;---------------------------------------------------
(0053) ; Insert your custom declarations below this banner
(0054) ;---------------------------------------------------
(0055) 
(0056) ;------------------------
(0057) ;  Includes
(0058) ;------------------------
(0059) 
(0060) 
(0061) ;------------------------
(0062) ;  Constant Definitions
(0063) ;------------------------
(0064) 
(0065) 
(0066) ;------------------------
(0067) ; Variable Allocation
(0068) ;------------------------
(0069) 
(0070) 
(0071) ;---------------------------------------------------
(0072) ; Insert your custom declarations above this banner
(0073) ;---------------------------------------------------
(0074) ;@PSoC_UserCode_END@ (Do not change this line.)
(0075) 
(0076) 
(0077) AREA UserModules (ROM, REL, CON)
(0078) 
(0079) ;-----------------------------------------------------------------------------
(0080) ;  FUNCTION NAME: _UART_1_TX_ISR
(0081) ;
(0082) ;  DESCRIPTION:
(0083) ;     UART TX interrupt handler for instance UART_1.
(0084) ;
(0085) ;     This is a place holder function.  If the user requires use of an interrupt
(0086) ;     handler for this function, then place code where specified.
(0087) ;-----------------------------------------------------------------------------
(0088) 
(0089) _UART_1_TX_ISR:
(0090)    ;@PSoC_UserCode_BODY_1@ (Do not change this line.)
(0091)    ;---------------------------------------------------
(0092)    ; Insert your custom code below this banner
(0093)    ;---------------------------------------------------
(0094)    ;   NOTE: interrupt service routines must preserve
(0095)    ;   the values of the A and X CPU registers.
(0096)    
(0097)    ;---------------------------------------------------
(0098)    ; Insert your custom code above this banner
(0099)    ;---------------------------------------------------
(0100)    ;@PSoC_UserCode_END@ (Do not change this line.)
(0101)    reti
    034F: 7E       RETI  
(0102) 
(0103) 
(0104) ;-----------------------------------------------------------------------------
(0105) ;  FUNCTION NAME: _UART_1_RX_ISR
(0106) ;
(0107) ;  DESCRIPTION:
(0108) ;     UART RX interrupt handler for instance UART_1.
(0109) ;     This ISR handles the background processing of received characters if
(0110) ;     the buffer is enabled.
(0111) ;