gyromousev1_2.lst

陀螺仪程序

    0000: 80 67    JMP   0x0068
    0002: 30       HALT  
    0003: 30       HALT  
FILE: .\boot.asm
(0001) ; Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
(0002) ;
(0003) ;@Id: boot.tpl#53 @
(0004) ;=============================================================================
(0005) ;  FILENAME:   boot.asm
(0006) ;  VERSION:    4.15
(0007) ;  DATE:       2 August 2004
(0008) ;
(0009) ;  DESCRIPTION:
(0010) ;  M8C Boot Code for CY8C27xxx microcontroller family.
(0011) ;
(0012) ;  Copyright (C) Cypress MicroSystems 2000-2004. All rights reserved.
(0013) ;
(0014) ; NOTES:
(0015) ; PSoC Designer's Device Editor uses a template file, BOOT.TPL, located in
(0016) ; the project's root directory to create BOOT.ASM. Any changes made to
(0017) ; BOOT.ASM will be  overwritten every time the project is generated; therfore
(0018) ; changes should be made to BOOT.TPL not BOOT.ASM. Care must be taken when
(0019) ; modifying BOOT.TPL so that replacement strings (such as @PROJECT_NAME)
(0020) ; are not accidentally modified.
(0021) ;
(0022) ;=============================================================================
(0023) 
(0024) include ".\lib\GlobalParams.inc"
(0025) include "m8c.inc"
(0026) include "m8ssc.inc"
(0027) include "memory.inc"
(0028) 
(0029) ;--------------------------------------
(0030) ; Export Declarations
(0031) ;--------------------------------------
(0032) 
(0033) export __Start
(0034) export __bss_start
(0035) export __data_start
(0036) export __idata_start
(0037) export __func_lit_start
(0038) export __text_start
(0039) export  _bGetPowerSetting
(0040) export   bGetPowerSetting
(0041) 
(0042) 
(0043) ;--------------------------------------
(0044) ; Optimization flags
(0045) ;--------------------------------------
(0046) ;
(0047) ; To change the value of these flags, modify the file boot.tpl, not
(0048) ; boot.asm. See the notes in the banner comment at the beginning of
(0049) ; this file.
(0050) 
(0051) ; Optimization for Assembly language (only) projects and C-language projects
(0052) ; that do not depend on the C compiler to initialize the values of RAM variables.
(0053) ;   Set to 1: Support for C Run-time Environment initialization
(0054) ;   Set to 0: Support for C not included. Faster start up, smaller code space.
(0055) ;
(0056) C_LANGUAGE_SUPPORT:              equ 1
(0057) 
(0058) 
(0059) ; The following equate is required for proper operation. Reseting its value
(0060) ; is discouraged.  WAIT_FOR_32K is effective only if the crystal oscillator is
(0061) ; selected.  If the designer chooses to not wait then stabilization of the ECO
(0062) ; and PLL_Lock must take place within user code. See the family data sheet for
(0063) ; the requirements of starting the ECO and PLL lock mode.
(0064) ;
(0065) ;   Set to 1: Wait for XTAL (& PLL if selected) to stabilize before
(0066) ;                invoking main
(0067) ;   Set to 0: Boot code does not wait; clock may not have stabilized by
(0068) ;               the time code in main starts executing.
(0069) ;
(0070) WAIT_FOR_32K:                    equ 1
(0071) 
(0072) 
(0073) ; For historical reasons, by default the boot code uses an lcall instruction
(0074) ; to invoke the user's _main code. If _main executes a return instruction,
(0075) ; boot provides an infinite loop. By changing the following equate from zero
(0076) ; to 1, boot's lcall will be replaced by a ljmp instruction, saving two
(0077) ; bytes on the stack which are otherwise required for the return address. If
(0078) ; this option is enabled, _main must not return. (Beginning with the 4.2
(0079) ; release, the C compiler automatically places an infinite loop at the end
(0080) ; of main, rather than a return instruction.)
(0081) ;
(0082) ENABLE_LJMP_TO_MAIN:             equ 0
(0083) 
(0084) 
(0085) ;-----------------------------------------------------------------------------
(0086) ; Interrupt Vector Table
(0087) ;-----------------------------------------------------------------------------
(0088) ;
(0089) ; Interrupt vector table entries are 4 bytes long.  Each one contains
(0090) ; a jump instruction to an ISR (Interrupt Service Routine), although
(0091) ; very short ISRs could be encoded within the table itself. Normally,
(0092) ; vector jump targets are modified automatically according to the user
(0093) ; modules selected. This occurs when the 'Generate Application' opera-
(0094) ; tion is run causing PSoC Designer to create boot.asm and the other
(0095) ; configuration files. If you need to hard code a vector, update the
(0096) ; file boot.tpl, not boot.asm. See the banner comment at the beginning
(0097) ; of this file.
(0098) ;-----------------------------------------------------------------------------
(0099) 
(0100)     AREA TOP (ROM, ABS, CON)
(0101) 
(0102)     org   0                        ;Reset Interrupt Vector
(0103)     jmp   __Start                  ;First instruction executed following a Reset
(0104) 
(0105)     org   04h                      ;Supply Monitor Interrupt Vector
(0106)     halt                           ;Stop execution if power falls too low
    0004: 30       HALT  
    0005: 30       HALT  
    0006: 30       HALT  
    0007: 30       HALT  
(0107) 
(0108)     org   08h                      ;Analog Column 0 Interrupt Vector
(0109)     // call	void_handler
(0110)     reti
    0008: 7E       RETI  
    0009: 30       HALT  
    000A: 30       HALT  
    000B: 30       HALT  
(0111) 
(0112)     org   0Ch                      ;Analog Column 1 Interrupt Vector
(0113)     // call	void_handler
(0114)     reti
    000C: 7E       RETI  
    000D: 30       HALT  
    000E: 30       HALT  
    000F: 30       HALT  
(0115) 
(0116)     org   10h                      ;Analog Column 2 Interrupt Vector
(0117)     // call	void_handler
(0118)     reti
    0010: 7E       RETI  
    0011: 30       HALT  
    0012: 30       HALT  
    0013: 30       HALT  
(0119) 
(0120)     org   14h                      ;Analog Column 3 Interrupt Vector
(0121)     // call	void_handler
(0122)     reti
    0014: 7E       RETI  
    0015: 30       HALT  
    0016: 30       HALT  
    0017: 30       HALT  
(0123) 
(0124)     org   18h                      ;VC3 Interrupt Vector
(0125)     // call	void_handler
(0126)     reti
    0018: 7E       RETI  
    0019: 30       HALT  
    001A: 30       HALT  
    001B: 30       HALT  
(0127) 
(0128)     org   1Ch                      ;GPIO Interrupt Vector
(0129)     // call	void_handler
(0130)     reti
    001C: 7E       RETI  
    001D: 30       HALT  
    001E: 30       HALT  
    001F: 30       HALT  
(0131) 
(0132)     org   20h                      ;PSoC Block DBB00 Interrupt Vector
(0133)     ljmp	_ADCINC_1_ADConversion_ISR
    0020: 7D 05 79 LJMP  0x0579
(0134)     reti
    0023: 7E       RETI  
(0135) 
(0136)     org   24h                      ;PSoC Block DBB01 Interrupt Vector
(0137)     // call	void_handler
(0138)     reti
    0024: 7E       RETI  
    0025: 30       HALT  
    0026: 30       HALT  
    0027: 30       HALT  
(0139) 
(0140)     org   28h                      ;PSoC Block DCB02 Interrupt Vector
(0141)     ljmp	_UART_1_TX_ISR
    0028: 7D 03 4F LJMP  0x034F
(0142)     reti
    002B: 7E       RETI  
(0143) 
(0144)     org   2Ch                      ;PSoC Block DCB03 Interrupt Vector
(0145)     ljmp	_UART_1_RX_ISR
    002C: 7D 03 50 LJMP  0x0350
(0146)     reti
    002F: 7E       RETI  
(0147) 
(0148)     org   30h                      ;PSoC Block DBB10 Interrupt Vector
(0149)     // call	void_handler
(0150)     reti
    0030: 7E       RETI  
    0031: 30       HALT  
    0032: 30       HALT  
    0033: 30       HALT  
(0151) 
(0152)     org   34h                      ;PSoC Block DBB11 Interrupt Vector
(0153)     // call	void_handler
(0154)     reti
    0034: 7E       RETI  
    0035: 30       HALT  
    0036: 30       HALT  
    0037: 30       HALT  
(0155) 
(0156)     org   38h                      ;PSoC Block DCB12 Interrupt Vector
(0157)     // call	void_handler
(0158)     reti
    0038: 7E       RETI  
    0039: 30       HALT  
    003A: 30       HALT  
    003B: 30       HALT  
(0159) 
(0160)     org   3Ch                      ;PSoC Block DCB13 Interrupt Vector
(0161)     // call	void_handler
(0162)     reti
    003C: 7E       RETI  
    003D: 30       HALT  
    003E: 30       HALT  
    003F: 30       HALT  
    0040: 30       HALT  
    0041: 30       HALT  
    0042: 30       HALT  
    0043: 30       HALT  
    0044: 30       HALT  
    0045: 30       HALT  
    0046: 30       HALT  
    0047: 30       HALT  
    0048: 30       HALT  
    0049: 30       HALT  
    004A: 30       HALT  
    004B: 30       HALT  
    004C: 30       HALT  
    004D: 30       HALT  
    004E: 30       HALT  
    004F: 30       HALT  
    0050: 30       HALT  
    0051: 30       HALT  
    0052: 30       HALT  
    0053: 30       HALT  
    0054: 30       HALT  
    0055: 30       HALT  
    0056: 30       HALT  
    0057: 30       HALT  
    0058: 30       HALT  
    0059: 30       HALT  
    005A: 30       HALT  
    005B: 30       HALT  
    005C: 30       HALT  
    005D: 30       HALT  
    005E: 30       HALT  
    005F: 30       HALT  
(0163) 
(0164)     org   60h                      ;PSoC I2C Interrupt Vector
(0165)     // call	void_handler
(0166)     reti
    0060: 7E       RETI  
    0061: 30       HALT  
    0062: 30       HALT  
    0063: 30       HALT  
(0167) 
(0168)     org   64h                      ;Sleep Timer Interrupt Vector
(0169)     // call	void_handler
(0170)     reti
    0064: 7E       RETI  
    0065: 30       HALT  
    0066: 30       HALT  
    0067: 30       HALT  
(0171) 
(0172) ;-----------------------------------------------------------------------------
(0173) ;  Start of Execution.
(0174) ;-----------------------------------------------------------------------------
(0175) ;  The Supervisory ROM SWBootReset function has already completed the
(0176) ;  calibrate1 process, loading trim values for 5 volt operation.
(0177) ;
(0178)     org 68h
(0179) __Start:
(0180) 
(0181)     ; initialize SMP values for voltage stabilization, if required,
(0182)     ; leaving power-on reset (POR) level at the default (low) level, at
(0183)     ; least for now. 
(0184)     ;
(0185)     M8C_SetBank1
    0068: 71 10    OR    F,16
(0186)     mov   reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST
    006A: 62 E3 80 MOV   REG[227],128
(0187)     M8C_SetBank0
    006D: 70 EF    AND   F,239
(0188) 
(0189) IF ( WATCHDOG_ENABLE )             ; WDT selected in Global Params
(0190)     M8C_EnableWatchDog
(0191) ENDIF
(0192) 
(0193) IF ( SELECT_32K )
(0194)     or   reg[CPU_SCR1],  CPU_SCR1_ECO_ALLOWED  ; ECO will be used in this project
(0195) ELSE
(0196)     and  reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED  ; Prevent ECO from being enabled
    006F: 41 FE FB AND   REG[254],251
(0197) ENDIF
(0198) 
(0199)     ;------------------
(0200)     ; Set up the stack
(0201)     ;------------------
(0202)     mov   A, __ramareas_end        ; Set top of stack to end of used RAM
    0072: 50 B0    MOV   A,176
(0203)     swap  SP, A                    ; This is only temporary if going to LMM
    0074: 4E       SWAP  SP,A
    0075: 55 FA 01 MOV   [250],1
(0204) 
(0205)     ;-----------------------------------------------
(0206)     ; Set Power-related Trim & the AGND Bypass bit.
(0207)     ;-----------------------------------------------
(0208) 
(0209) IF ( SUPPLY_VOLTAGE )         ; 1 means 5.0V
(0210)  IF ( AGND_BYPASS )
(0211)     ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
(0212)     ; The 5V trim has already been set, but we need to update the AGNDBYP
(0213)     ; bit in the write-only BDG_TR register. Recalculate the register
(0214)     ; value using the proper trim values.
(0215)     ;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
(0216)     M8SSC_SetTableVoltageTrim 1, SSCTBL1_TRIM_BGR_5V, AGND_BYPASS_JUST
(0217)  ENDIF
(0218) ELSE    ; 3.3 V Operation, not 5.0V