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📄 dk3200_1_demo.lst

📁 ST公司的upsd dk2000评估板仿真eeprom的源程序。
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 472   3                              status = Sector_Test( RECEIVE_DATA, VALID__SECTOR );
 473   3                              
 474   3                              // State 8 - sector 0 RECEIVE_DATA, sector 1 TRANSFER_COMPLETE
 475   3                              status = Sector_Test( RECEIVE_DATA, TRANSFER_COMPLETE );
 476   3                              
 477   3                              // State 9 - sector 0 VALID__SECTOR, sector 1 ERASED
 478   3                              status = Sector_Test( VALID__SECTOR, ERASED );
 479   3                              
 480   3                              // State 10 - sector 0 VALID__SECTOR, sector 1 RECEIVE_DATA
 481   3                              status = Sector_Test( VALID__SECTOR, RECEIVE_DATA );
 482   3                              
 483   3                              // State 11 - sector 0 VALID__SECTOR, sector 1 VALID__SECTOR
 484   3                              status = Sector_Test( VALID__SECTOR, VALID__SECTOR );
 485   3                              
 486   3                              // State 12 - sector 0 VALID__SECTOR, sector 1 TRANSFER_COMPLETE
 487   3                              status = Sector_Test( VALID__SECTOR, TRANSFER_COMPLETE );
 488   3                              
 489   3                              // State 13 - sector 0 TRANSFER_COMPLETE, sector 1 ERASED
C51 COMPILER V7.00  DK3200_1_DEMO                                                          01/21/2003 14:51:26 PAGE 9   

 490   3                              status = Sector_Test( TRANSFER_COMPLETE, ERASED );
 491   3                              
 492   3                              // State 14 - sector 0 TRANSFER_COMPLETE, sector 1 RECEIVE_DATA
 493   3                              status = Sector_Test( TRANSFER_COMPLETE, RECEIVE_DATA );
 494   3                              
 495   3                              // State 15 - sector 0 TRANSFER_COMPLETE, sector 1 VALID__SECTOR
 496   3                              status = Sector_Test( TRANSFER_COMPLETE, VALID__SECTOR );
 497   3                              
 498   3                              // State 16 - sector 0 TRANSFER_COMPLETE, sector 1 TRANSFER_COMPLETE
 499   3                              status = Sector_Test( TRANSFER_COMPLETE, TRANSFER_COMPLETE );
 500   3                              break;
 501   3                              
 502   3                      }
 503   2                      case e4f:
 504   2                      {
 505   3                              // Format sectors if not already done
 506   3                              if (    (Get_Sector_Status(SECTOR_0) == ERASED) &&
 507   3                                              (Get_Sector_Status(SECTOR_1) == ERASED) )
 508   3                              {
 509   4                                      status = EEPROM_Format(0x002E);
 510   4                                      // Write max records
 511   4                                      for ( i=0; i<0x2E; i++ )
 512   4                                      {
 513   5                                              if ( Update_Record(i, &buf1) ) status = 1;
 514   5                                      }
 515   4      
 516   4                                      // Infinite loop - stop using the debugger when sector swap occurs,
 517   4                                      // then cycle power to get to Init
 518   4                                      for (;;)
 519   4                                              if ( Update_Record(0x10, &buf2) ) status = 1;
 520   4                              }
 521   3      
 522   3                              // Run init - verify recovery
 523   3                              status = Eeprom_Init(); 
 524   3                       
 525   3                              printfLCD("Init     \n");
 526   3                              printfLCD("%x\n", status);
 527   3                               
 528   3                              break;
 529   3                      }
 530   2                      case e5a:
 531   2                      {
 532   3                              status = Eeprom_Sector_Erase_Start(SECTOR_0);
 533   3                              status = Boot_Flash_Write(SECTOR_1_BASE_ADDRESS, 0xAA);
 534   3      
 535   3                              status = Eeprom_Sector_Erase_Start(SECTOR_1);
 536   3                              status = Boot_Flash_Write(SECTOR_0_BASE_ADDRESS, 0xAA);
 537   3      
 538   3                              status = Eeprom_Sector_Erase(SECTOR_0);
 539   3                              break;
 540   3                      }
 541   2                      case e6a:
 542   2                      {
 543   3                              status = Eeprom_Sector_Erase_Start(SECTOR_0);
 544   3                              status = Boot_Flash_Write(SECTOR_1_BASE_ADDRESS, 0xAA);
 545   3      
 546   3                              status = Eeprom_Sector_Erase_Start(SECTOR_1);
 547   3                              status = Boot_Flash_Write(SECTOR_0_BASE_ADDRESS, 0xAA);
 548   3      
 549   3                              status = Eeprom_Sector_Erase(SECTOR_0);
 550   3                              break;
 551   3                      }
C51 COMPILER V7.00  DK3200_1_DEMO                                                          01/21/2003 14:51:26 PAGE 10  

 552   2                      case e7a:       // verify re-entrant call to read using ISR returns error
 553   2                      {
 554   3                              EA = 0;                 /* disable interrupts */
 555   3                              ET1 = 1;                /* enable timer 1 interrupt */          
 556   3                              status = Boot_Flash_Read(SECTOR_0_BASE_ADDRESS);
 557   3      
 558   3                              printfLCD("Read (reentrant)\n");
 559   3                              printfLCD("%x\n", status);
 560   3      
 561   3                              delay_2sec();
 562   3      
 563   3                              printfLCD("Read (interrupt)\n");
 564   3                              printfLCD("%x\n", r_stat);
 565   3      
 566   3                              break;
 567   3                      }
 568   2                      case e7b:       // verify re-entrant call to write using ISR returns error
 569   2                      {
 570   3                              EA = 0;                 /* disable interrupts */
 571   3                              ET1 = 1;                /* enable timer 1 interrupt */          
 572   3                              status = Boot_Flash_Write(SECTOR_0_BASE_ADDRESS + 1, 0xBB);
 573   3      
 574   3                              printfLCD("Write (reent)\n");
 575   3                              printfLCD("%x\n", status);
 576   3      
 577   3                              delay_2sec();
 578   3      
 579   3                              printfLCD("Write (int)  \n");
 580   3                              printfLCD("%x\n", r_stat);
 581   3      
 582   3                              break;
 583   3                      }
 584   2                      default:
 585   2                              break;
 586   2               }
 587   1      //   }  
 588   1      }  // End main
 589          
 590          
 591          
C51 COMPILER V7.00  DK3200_1_DEMO                                                          01/21/2003 14:51:26 PAGE 11  

NAME                                    CLASS   MSPACE  TYPE    OFFSET  SIZE
====                                    =====   ======  ====    ======  ====


e7b. . . . . . . . . . . . . . . . . .  E_CONST  -----  U_CHAR   -----  1
e4e. . . . . . . . . . . . . . . . . .  E_CONST  -----  U_CHAR   -----  1
e4f. . . . . . . . . . . . . . . . . .  E_CONST  -----  U_CHAR   -----  1
P1 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0090H  1
AA . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00DAH  1
P3 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00B0H  1
T0 . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B4H  1
AC . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00D6H  1
P4 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00C0H  1
T1 . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B5H  1
timer1_isr . . . . . . . . . . . . . .  STATIC   CODE   PROC     0000H  -----
T2 . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0090H  1
EA . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00AFH  1
UISTA. . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00E8H  1
_Update_Record . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
ENI1 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00DEH  1
IE . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A8H  1
r_stat . . . . . . . . . . . . . . . .  PUBLIC   XDATA  U_CHAR   0000H  1
P1_0 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0090H  1
size_t . . . . . . . . . . . . . . . .  TYPEDEF  -----  U_INT    -----  2
P1_1 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0091H  1
P3_0 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B0H  1
P1_2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0092H  1
P4_0 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C0H  1
P3_1 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B1H  1
P1_3 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0093H  1
P4_1 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C1H  1
P3_2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B2H  1
P1_4 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0094H  1
P4_2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C2H  1
P3_3 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B3H  1
P1_5 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0095H  1
EXF2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00CEH  1
P4_3 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C3H  1
P3_4 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B4H  1
P1_6 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0096H  1
__isd_init . . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
P4_4 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C4H  1
P3_5 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B5H  1
P1_7 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0097H  1
ES . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00ACH  1
record_entry . . . . . . . . . . . . .  * TAG *  -----  STRUCT   -----  4
  status . . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0000H  1
  record_data. . . . . . . . . . . . .  MEMBER   -----  ARRAY    0001H  1
  last_record_update . . . . . . . . .  MEMBER   -----  PTR      0002H  2
P4_5 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C5H  1
P3_6 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B6H  1
IP . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00B8H  1
P4_6 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C6H  1
P3_7 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B7H  1
P4_7 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C7H  1
RI . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0098H  1
ADDR . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00DBH  1
INT0 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B2H  1
CY . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00D7H  1
INT1 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B3H  1
TI . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0099H  1
C51 COMPILER V7.00  DK3200_1_DEMO                                                          01/21/2003 14:51:26 PAGE 12  

NAME                                    CLASS   MSPACE  TYPE    OFFSET  SIZE
====                                    =====   ======  ====    ======  ====


lcd_clear. . . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
_Read_Record . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
RXD2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0092H  1
RCAP2H . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00CBH  1
TXD2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0093H  1
PS . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00BCH  1
T2EX . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0091H  1
DDCSDA . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C0H  1
OV . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00D2H  1
_Boot_Flash_Read . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
RCAP2L . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00CAH  1
main . . . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  timer2_baud. . . . . . . . . . . . .  * REG *  DATA   U_INT    0006H  2
  status . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0000H  1
  flag . . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0001H  1
  flag2. . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0002H  1
  flag3. . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0003H  1
  flag4. . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0004H  1
  buf. . . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0000H  1
  buf1 . . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0001H  1
  buf2 . . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0002H  1
  buf3 . . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0003H  1
  buf4 . . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0004H  1
  buftst . . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0005H  1024
  buftemp. . . . . . . . . . . . . . .  AUTO     XDATA  ARRAY    0405H  1024
  i. . . . . . . . . . . . . . . . . .  AUTO     IDATA  U_INT    0000H  2
  db . . . . . . . . . . . . . . . . .  AUTO     XDATA  U_CHAR   0805H  1
  e_test . . . . . . . . . . . . . . .  AUTO     IDATA  U_CHAR   0002H  1
  loop_count . . . . . . . . . . . . .  AUTO     XDATA  U_INT    0806H  2
rand . . . . . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
C_T2 . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C9H  1
EOPF . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00E9H  1
RCLK . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00CDH  1
TCLK . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00CCH  1
DDCSCL . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C1H  1
Mix_Reg. . . . . . . . . . . . . . . .  TYPEDEF  XDATA  UNION    -----  1
  byte . . . . . . . . . . . . . . . .  MEMBER   -----  CHAR     0000H  1
  bits . . . . . . . . . . . . . . . .  MEMBER   -----  STRUCT   0000H  1
PWMCH0 . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00C3H  1
SBUF . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0099H  1
PCON . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0087H  1
REG_PSD_struct . . . . . . . . . . . .  * TAG *  -----  STRUCT   -----  256
  DATAIN_A . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0000H  1
  DATAIN_B . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0001H  1
  CONTROL_A. . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0002H  1
  CONTROL_B. . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0003H  1
  DATAOUT_A. . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0004H  1
  DATAOUT_B. . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0005H  1
  DIRECTION_A. . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0006H  1
  DIRECTION_B. . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0007H  1
  DRIVE_A. . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0008H  1
  DRIVE_B. . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   0009H  1
  IMC_A. . . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   000AH  1
  IMC_B. . . . . . . . . . . . . . . .  MEMBER   -----  U_CHAR   000BH  1

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