📄 main.ls1
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0004 4480 621 ORL A,#080H
0006 F0 622 MOVX @DPTR,A
623 ; // bit 7 - PIO (1=enable)
624 ; // bit 4 - RD access FLASH (1=enable)
625 ; // bit 3 - RD access EEPROM (1=enable)
626 ; // bit 2 - PSEN access FLASH (1=enable)
627 ; // bit 1 - PSEN access EEPROM (1=enable)
628 ; // bit 0 - PSEN access SRAM (1=enable)
629 ;
630 ;
A51 MACRO ASSEMBLER MAIN 10/15/2004 20:55:29 PAGE 11
631 ; /****** power management ******/
632 ; UPSD_xreg.PMMR0=0x38; // power-on default = 0x00
633 ; SOURCE LINE # 228
0007 900000 F 634 MOV DPTR,#UPSD_xreg+0B0H
000A 7438 635 MOV A,#038H
000C F0 636 MOVX @DPTR,A
637 ; // bit 5 - CLKIN input to MCell (1=off)
638 ; // bit 4 - CLKIN input to PLD array (1=off)
639 ; // bit 3 - PLD turbo mode (ZPSD only) (1=disable)
640 ; // bit 1 - APD unit (1=enable)
641 ;
642 ; UPSD_xreg.PMMR2=0x70; // power-on default = 0x00
643 ; SOURCE LINE # 234
000D 900000 F 644 MOV DPTR,#UPSD_xreg+0B4H
0010 7470 645 MOV A,#070H
0012 F0 646 MOVX @DPTR,A
647 ; // bit 6 - DBE input to PLD array (1=off)
648 ; // bit 5 - ALE input to PLD array (1=off)
649 ; // bit 4 - CNTL2 input to PLD array (1=off)
650 ; // bit 3 - CNTL1 input to PLD array (1=off)
651 ; // bit 2 - CNTL0 input to PLD array (1=off)
652 ; }
653 ; SOURCE LINE # 240
0013 22 654 RET
655 ; END OF initXREG
656
657 ;
658 ;
659 ;
660 ;
661 ;
662 ;
663 ;
664 ;
665 ;
666 ;
667 ;
668 ;
669 ;
670 ; #ifdef DisconnectOnDemand
671 ;
672 ; static void ReConnectUSB()
673 ; /******************************************************************************
674 ; Function : static void ReConnectUSB()
675 ; Parameters : none
676 ; Description: Use insted of UsbInitialize when DisconnectOnDemand feature
677 ; is implemented.
678 ; Be sure that the DisconnectOnDemand feature is present on DK3200.
679 ; ******************************************************************************/
680 ; {
681 ; data int w;
682 ;
683 ; UIEN = 0; // Disable all USB interrupts
684 ; UADR = 0; // Disable USB hardware
685 ;
686 ; LCDBufTXIndex = 0; // LCD disp position for USB
687 ;
688 ; UPSD_xreg.DATAOUT_C &= 0xEF; // PC4=0
689 ; UPSD_xreg.DRIVE_C |= 0x10; // set as OpenDrain
690 ; UPSD_xreg.DIRECTION_C |= 0x10; // set as output
691 ;
692 ; printfLCD("\rUSB Disconnected");
693 ;
694 ; while ((UPSD_xreg.DATAIN_B & 0x04)==0)
695 ; {
696 ; for (w=0;w<600*50;w++); // wait 50 ms
A51 MACRO ASSEMBLER MAIN 10/15/2004 20:55:29 PAGE 12
697 ; }
698 ;
699 ; UPSD_xreg.DRIVE_C &= 0xEF; // set PC4 as input
700 ; UPSD_xreg.DIRECTION_C &= 0xEF; // set PC4 as input
701 ;
702 ; UsbInitialize();
703 ; printfLCD("\rUSB Reconnected.");
704 ; }
705 ;
706 ; #endif
707 ;
708 ;
709 ;
710 ;
711 ;
712 ;
713 ;
714 ;
715 ;
716 ;
717 ;
718 ;
719 ;
720 ;
721 ;
722 ; static void WriteBufferToFlash(uchar flash, uint16 address, uchar* buf, uint16 cb)
723
---- 724 RSEG ?PR?_WriteBufferToFlash?MAIN
0000 725 _WriteBufferToFlash:
726 USING 0
727 ; SOURCE LINE # 306
0000 900000 F 728 MOV DPTR,#flash?140
0003 EF 729 MOV A,R7
0004 F0 730 MOVX @DPTR,A
0005 900000 F 731 MOV DPTR,#buf?142
0008 EB 732 MOV A,R3
0009 F0 733 MOVX @DPTR,A
000A A3 734 INC DPTR
000B EA 735 MOV A,R2
000C F0 736 MOVX @DPTR,A
000D A3 737 INC DPTR
000E E9 738 MOV A,R1
000F F0 739 MOVX @DPTR,A
740 ;---- Variable 'address?141' assigned to Register 'R4/R5' ----
741 ; /******************************************************************************
742 ; Function : static void WriteBufferToFlash()
743 ; Parameters : (uchar flash, uint16 address, uchar* buf, uint16 cb)
744 ; Description: WriteBufferToFlash()
745 ; ******************************************************************************/
746 ; {
747 ; SOURCE LINE # 312
748 ; // Assume desired flash segment is mapped into high 32k of xdata space
749 ; volatile uchar xdata* p = (volatile uchar xdata*) address;
750 ; SOURCE LINE # 314
0010 CF 751 XCH A,R7
0011 ED 752 MOV A,R5
0012 CF 753 XCH A,R7
0013 900000 F 754 MOV DPTR,#p?144
0016 EC 755 MOV A,R4
0017 F0 756 MOVX @DPTR,A
0018 A3 757 INC DPTR
0019 EF 758 MOV A,R7
001A F0 759 MOVX @DPTR,A
760 ;
761 ; if (flash == PRIMARY_FLASH)
762 ; SOURCE LINE # 316
A51 MACRO ASSEMBLER MAIN 10/15/2004 20:55:29 PAGE 13
001B 900000 F 763 MOV DPTR,#flash?140
001E E0 764 MOVX A,@DPTR
001F 7049 765 JNZ ?C0006
766 ; {
767 ; SOURCE LINE # 317
0021 768 ?C0003:
769 ; while (cb--)
770 ; SOURCE LINE # 318
0021 900000 F 771 MOV DPTR,#cb?143
0024 74FF 772 MOV A,#0FFH
0026 F5F0 773 MOV B,A
0028 120000 F 774 LCALL ?C?ILDIX
002B 45F0 775 ORL A,B
002D 7003 776 JNZ $ + 5H
002F 020000 F 777 LJMP ?C0008
778 ; {
779 ; SOURCE LINE # 319
780 ; flash_write_with_poll(p, *buf++);
781 ; SOURCE LINE # 320
0032 900000 F 782 MOV DPTR,#p?144
0035 E0 783 MOVX A,@DPTR
0036 FE 784 MOV R6,A
0037 A3 785 INC DPTR
0038 E0 786 MOVX A,@DPTR
0039 FF 787 MOV R7,A
003A 900000 F 788 MOV DPTR,#buf?142
003D E0 789 MOVX A,@DPTR
003E FB 790 MOV R3,A
003F A3 791 INC DPTR
0040 E4 792 CLR A
0041 75F001 793 MOV B,#01H
0044 120000 F 794 LCALL ?C?ILDIX
0047 A9F0 795 MOV R1,B
0049 FA 796 MOV R2,A
004A 120000 F 797 LCALL ?C?CLDPTR
004D FD 798 MOV R5,A
004E 120000 F 799 LCALL _flash_write_with_poll
800 ; status.u.status.checkSum += *p++;
801 ; SOURCE LINE # 321
0051 900000 F 802 MOV DPTR,#p?144
0054 E4 803 CLR A
0055 75F001 804 MOV B,#01H
0058 120000 F 805 LCALL ?C?ILDIX
005B 85F082 806 MOV DPL,B
005E F583 807 MOV DPH,A
0060 E0 808 MOVX A,@DPTR
0061 FF 809 MOV R7,A
0062 900000 F 810 MOV DPTR,#status+05H
0065 E0 811 MOVX A,@DPTR
0066 2F 812 ADD A,R7
0067 F0 813 MOVX @DPTR,A
814 ; }
815 ; SOURCE LINE # 322
0068 80B7 816 SJMP ?C0003
817 ; }
818 ; SOURCE LINE # 323
819 ; else
820 ; {
821 ; SOURCE LINE # 325
006A 822 ?C0006:
823 ; while (cb--)
824 ; SOURCE LINE # 326
006A 900000 F 825 MOV DPTR,#cb?143
006D 74FF 826 MOV A,#0FFH
006F F5F0 827 MOV B,A
0071 120000 F 828 LCALL ?C?ILDIX
A51 MACRO ASSEMBLER MAIN 10/15/2004 20:55:29 PAGE 14
0074 45F0 829 ORL A,B
0076 6038 830 JZ ?C0008
831 ; {
832 ; SOURCE LINE # 327
833 ; flash_boot_write_with_poll(p, *buf++);
834 ; SOURCE LINE # 328
0078 900000 F 835 MOV DPTR,#p?144
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