pll2407.c

ucos在2407A上的移植

/*--------------------------------------------------------*/
/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
/*--------------------------------------------------------*/
/* PLL test for EVM320LF2407				              */
/* Set the PLL to 30 Megaghertz 			              */
/*--------------------------------------------------------*/
/*  EVM Test Code Shell 				                  */
/*  file name:	 pll2407.c				                  */
/*  Started    : 08/18/2001    by: WQ				      */
/*--------------------------------------------------------*/
//#include "includes.h"
//#include "prot2407.h"
//include "f2407_c.h"
#define   PS2	 0x0800
#define   PS1	 0x0400
#define   PS0	 0x0200

#define   FREQIN4	(    0	    )
#define   FREQIN2	(		    ( PS0 ) )
#define   FREQIN1_33	(	  ( PS1 )	    )
#define   FREQIN1	(	  ( PS1 ) | ( PS0 ) )
#define   FREQIN_8	( ( PS2)		    )
#define   FREQIN_66	( ( PS2) |	    ( PS0)  )
#define   FREQIN_57	( ( PS2) | ( PS1)	    )
#define   FREQIN_50	( ( PS2) | ( PS1) | ( PS0)  )

#define SCSR111		0x7018
#define SCSR1_PTR      ((unsigned int*)SCSR111)


void set_pll( void )
{
  unsigned int scsr1_val;
  unsigned int set_freq;

  scsr1_val = *SCSR1_PTR;

  scsr1_val &= (~(PS2 | PS1 | PS0 ));

  set_freq = FREQIN2;

  scsr1_val |= set_freq;	     /* For rev 1.1 devices 30 mhz */

  *SCSR1_PTR = scsr1_val;

  wait_ms(200);

}