er.vhd

来自「大家一定要看 哦 程序在与多看多练 我找了好久才找到呢」· VHDL 代码 · 共 13 行

library ieee;
use ieee.std_logic_1164.all;
use work.mypack1.all;
entity er  is
port(a,b:in std_logic;
      q:out std_logic);
end er;
architecture behav of er is
begin
q<=minium(a,b);
end;