alpher.vhd

来自「大家一定要看 哦 程序在与多看多练 我找了好久才找到呢」· VHDL 代码 · 共 47 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
ENTITY alpher IS
	PORT(
		clk		: IN	STD_LOGIC;
		choice	: OUT	STD_LOGIC_VECTOR(7 downto 0);
		data	: OUT	STD_LOGIC_VECTOR(7 downto 0));
END alpher;

ARCHITECTURE a OF alpher IS
	SIGNAL count : STD_LOGIC_VECTOR(3 downto 0);
	SIGNAL temp : STD_LOGIC_VECTOR(3 downto 0);

BEGIN
choice<="10000000";

clk1_label:
PROCESS (clk)
BEGIN
IF clk'event and clk='1' THEN
    count<=count+1;
END IF;
END PROCESS clk1_label;


WITH count select
	data  <= "11111100" WHEN "0000",
			   "01100000" WHEN "0001",
			   "11011010" WHEN "0010",
			   "11110010" WHEN "0011",
			   "01100110" WHEN "0100",
			   "10110110" WHEN "0101",
			   "10111110" WHEN "0110",
			   "11100000" WHEN "0111",
			   "11111110" WHEN "1000",
			   "11110110" WHEN "1001",
			   "11101110" WHEN "1010",
			   "00111110" WHEN "1011",
			   "10011100" WHEN "1100",
			   "01111010" WHEN "1101",
			   "10011110" WHEN "1110",
			   "10001110" WHEN OTHERS;

END a;