ex98.vhd

来自「大家一定要看 哦 程序在与多看多练 我找了好久才找到呢」· VHDL 代码 · 共 17 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY EX98 IS
		PORT(
        si      : in integer range 0 to 15;
		sig	    : OUT integer range 0 to 15);
END EX98;
ARCHITECTURE a OF EX98 IS
	BEGIN
	   sig <=si after 200 ns;
	END a;