and2_comp.vhd

大家一定要看 哦 程序在与多看多练 我找了好久才找到呢

--c<=a and b----

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY and2_comp IS
		PORT(
		a, b: IN	bit;
				c: OUT	bit);
END and2_comp;
ARCHITECTURE and2_behav OF and2_comp IS
	BEGIN
	c<=a and b;
END and2_behav;