hppa.s

lwip在ucos上的移植

	.SPACE $PRIVATE$
	.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
	.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
	.SPACE $TEXT$
	.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
	.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
	.IMPORT $global$,DATA
	.IMPORT $$dyncall,MILLICODE
; gcc_compiled.:
	.SPACE $TEXT$
	.SUBSPA $CODE$

	.align 4
	.EXPORT integer_memory_tests,CODE
	.EXPORT integer_indexing_load,CODE
	.EXPORT integer_load_short_memory,CODE
	.EXPORT integer_store_short_memory,CODE
	.EXPORT immediate_tests,CODE
	.EXPORT branch_tests_1,CODE
	.EXPORT branch_tests_2,CODE
	.EXPORT movb_tests,CODE
	.EXPORT movb_nullified_tests,CODE
	.EXPORT movib_tests,CODE
	.EXPORT movib_nullified_tests,CODE
	.EXPORT comb_tests_1,CODE
	.EXPORT comb_tests_2,CODE
	.EXPORT comb_nullified_tests_1,CODE
	.EXPORT comb_nullified_tests_2,CODE
	.EXPORT comib_tests_1,CODE
	.EXPORT comib_tests_2,CODE
	.EXPORT comib_nullified_tests_1,CODE
	.EXPORT comib_nullified_tests_2,CODE
	.EXPORT addb_tests_1,CODE
	.EXPORT addb_tests_2,CODE
	.EXPORT addb_nullified_tests_1,CODE
	.EXPORT addb_nullified_tests_2,CODE
	.EXPORT addib_tests_1,CODE
	.EXPORT addib_tests_2,CODE
	.EXPORT addib_nullified_tests_1,CODE
	.EXPORT addib_nullified_tests_2,CODE
	.EXPORT bb_tests,CODE
	.EXPORT add_tests,CODE
	.EXPORT addl_tests,CODE
	.EXPORT addo_tests,CODE
	.EXPORT addc_tests,CODE
	.EXPORT addco_tests,CODE
	.EXPORT sh1add_tests,CODE
	.EXPORT sh1addl_tests,CODE
	.EXPORT sh1addo_tests,CODE
	.EXPORT sh2add_tests,CODE
	.EXPORT sh2addl_tests,CODE
	.EXPORT sh2addo_tests,CODE
	.EXPORT sh3add_tests,CODE
	.EXPORT sh3addl_tests,CODE
	.EXPORT sh3addo_tests,CODE
	.EXPORT sub_tests,CODE
	.EXPORT subo_tests,CODE
	.EXPORT subb_tests,CODE
	.EXPORT subbo_tests,CODE
	.EXPORT subt_tests,CODE
	.EXPORT subto_tests,CODE
	.EXPORT ds_tests,CODE
	.EXPORT comclr_tests,CODE
	.EXPORT or_tests,CODE
	.EXPORT xor_tests,CODE
	.EXPORT and_tests,CODE
	.EXPORT andcm_tests,CODE
	.EXPORT uxor_tests,CODE
	.EXPORT uaddcm_tests,CODE
	.EXPORT uaddcmt_tests,CODE
	.EXPORT dcor_tests,CODE
	.EXPORT idcor_tests,CODE
	.EXPORT addi_tests,CODE
	.EXPORT addio_tests,CODE
	.EXPORT addit_tests,CODE
	.EXPORT addito_tests,CODE
	.EXPORT subi_tests,CODE
	.EXPORT subio_tests,CODE
	.EXPORT comiclr_tests,CODE
	.EXPORT vshd_tests,CODE
	.EXPORT shd_tests,CODE
	.EXPORT extru_tests,CODE
	.EXPORT extrs_tests,CODE
	.EXPORT zdep_tests,CODE
	.EXPORT dep_tests,CODE
	.EXPORT vextru_tests,CODE
	.EXPORT vextrs_tests,CODE
	.EXPORT zvdep_tests,CODE
	.EXPORT vdep_tests,CODE
	.EXPORT vdepi_tests,CODE
	.EXPORT zvdepi_tests,CODE
	.EXPORT depi_tests,CODE
	.EXPORT zdepi_tests,CODE
	.EXPORT system_control_tests,CODE
	.EXPORT probe_tests,CODE
	.EXPORT lpa_tests,CODE
	.EXPORT purge_tests,CODE
	.EXPORT insert_tests,CODE
	.EXPORT fpu_misc_tests,CODE
	.EXPORT fpu_memory_indexing_tests,CODE
	.EXPORT fpu_short_memory_tests,CODE
	.EXPORT fcpy_tests,CODE
	.EXPORT fabs_tests,CODE
	.EXPORT fsqrt_tests,CODE
	.EXPORT frnd_tests,CODE
	.EXPORT fcnvff_tests,CODE
	.EXPORT fcnvxf_tests,CODE
	.EXPORT fcnvfx_tests,CODE
	.EXPORT fcnvfxt_tests,CODE
	.EXPORT fadd_tests,CODE
	.EXPORT fsub_tests,CODE
	.EXPORT fmpy_tests,CODE
	.EXPORT fdiv_tests,CODE
	.EXPORT frem_tests,CODE
	.EXPORT fcmp_sgl_tests_1,CODE
	.EXPORT fcmp_sgl_tests_2,CODE
	.EXPORT fcmp_sgl_tests_3,CODE
	.EXPORT fcmp_sgl_tests_4,CODE
	.EXPORT fcmp_dbl_tests_1,CODE
	.EXPORT fcmp_dbl_tests_2,CODE
	.EXPORT fcmp_dbl_tests_3,CODE
	.EXPORT fcmp_dbl_tests_4,CODE
	.EXPORT fcmp_quad_tests_1,CODE
	.EXPORT fcmp_quad_tests_2,CODE
	.EXPORT fcmp_quad_tests_3,CODE
	.EXPORT fcmp_quad_tests_4,CODE
	.EXPORT fmpy_addsub_tests,CODE
	.EXPORT xmpyu_tests,CODE
	.EXPORT special_tests,CODE
	.EXPORT sfu_tests,CODE
	.EXPORT copr_tests,CODE
	.EXPORT copr_indexing_load,CODE
	.EXPORT copr_indexing_store,CODE
	.EXPORT copr_short_memory,CODE
	.EXPORT fmemLRbug_tests_1,CODE
	.EXPORT fmemLRbug_tests_2,CODE
	.EXPORT fmemLRbug_tests_3,CODE
	.EXPORT fmemLRbug_tests_4,CODE
	.EXPORT main,CODE
	.EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR
main
	.PROC
	.CALLINFO FRAME=64,NO_CALLS,SAVE_SP
	.ENTRY
	copy %r4,%r1
	copy %r30,%r4
	stwm %r1,64(0,%r30)
; First memory reference instructions.
; Should try corner cases for each field extraction.
; Should deal with s == 0 case somehow?!?
integer_memory_tests
	ldw 0(0,%r4),%r26
	ldh 0(0,%r4),%r26
	ldb 0(0,%r4),%r26
	stw %r26,0(0,%r4)
	sth %r26,0(0,%r4)
	stb %r26,0(0,%r4)

; Should make sure pre/post modes are recognized correctly.
	ldwm 0(0,%r4),%r26
	stwm %r26,0(0,%r4)

integer_indexing_load
	ldwx %r5(0,%r4),%r26
	ldwx,s %r5(0,%r4),%r26
	ldwx,m %r5(0,%r4),%r26
	ldwx,sm %r5(0,%r4),%r26
	ldhx %r5(0,%r4),%r26
	ldhx,s %r5(0,%r4),%r26
	ldhx,m %r5(0,%r4),%r26
	ldhx,sm %r5(0,%r4),%r26
	ldbx %r5(0,%r4),%r26
	ldbx,s %r5(0,%r4),%r26
	ldbx,m %r5(0,%r4),%r26
	ldbx,sm %r5(0,%r4),%r26
	ldwax %r5(%r4),%r26
	ldwax,s %r5(%r4),%r26
	ldwax,m %r5(%r4),%r26
	ldwax,sm %r5(%r4),%r26
	ldcwx %r5(0,%r4),%r26
	ldcwx,s %r5(0,%r4),%r26
	ldcwx,m %r5(0,%r4),%r26
	ldcwx,sm %r5(0,%r4),%r26

integer_load_short_memory
	ldws 0(0,%r4),%r26
	ldws,mb 0(0,%r4),%r26
	ldws,ma 0(0,%r4),%r26
	ldhs 0(0,%r4),%r26
	ldhs,mb 0(0,%r4),%r26
	ldhs,ma 0(0,%r4),%r26
	ldbs 0(0,%r4),%r26
	ldbs,mb 0(0,%r4),%r26
	ldbs,ma 0(0,%r4),%r26
	ldwas 0(%r4),%r26
	ldwas,mb 0(%r4),%r26
	ldwas,ma 0(%r4),%r26
	ldcws 0(0,%r4),%r26
	ldcws,mb 0(0,%r4),%r26
	ldcws,ma 0(0,%r4),%r26

integer_store_short_memory
	stws %r26,0(0,%r4)
	stws,mb %r26,0(0,%r4)
	stws,ma %r26,0(0,%r4)
	sths %r26,0(0,%r4)
	sths,mb %r26,0(0,%r4)
	sths,ma %r26,0(0,%r4)
	stbs %r26,0(0,%r4)
	stbs,mb %r26,0(0,%r4)
	stbs,ma %r26,0(0,%r4)
	stwas %r26,0(%r4)
	stwas,mb %r26,0(%r4)
	stwas,ma %r26,0(%r4)
	stbys %r26,0(0,%r4)
	stbys,b %r26,0(0,%r4)
	stbys,e %r26,0(0,%r4)
	stbys,b,m %r26,0(0,%r4)
	stbys,e,m %r26,0(0,%r4)

; Immediate instructions.
immediate_tests
	ldo 5(%r26),%r26
	ldil L%0xdeadbeef,%r26
	addil L%0xdeadbeef,%r5

; Lots of branch instructions.
; blr with %r0 as return pointer should really be just br <target>,
; but the assemblers can't handle it.
branch_tests_1
	bl main,%r2
	bl,n main,%r2
	b main
	b,n main
	gate main,%r2
	gate,n main,%r2
	blr %r4,%r2
	blr,n %r4,%r2
	blr %r4,%r0
	blr,n %r4,%r0
branch_tests_2
	bv 0(%r2)
	bv,n 0(%r2)
	be 0x1234(%sr1,%r2)
	be,n 0x1234(%sr1,%r2)
	ble 0x1234(%sr1,%r2)
	ble,n 0x1234(%sr1,%r2)

; GAS can't assemble movb,n or movib,n.
movb_tests
	movb %r4,%r26,movb_tests
	movb,= %r4,%r26,movb_tests
	movb,< %r4,%r26,movb_tests
	movb,od %r4,%r26,movb_tests
	movb,tr %r4,%r26,movb_tests
	movb,<> %r4,%r26,movb_tests
	movb,>= %r4,%r26,movb_tests
	movb,ev %r4,%r26,movb_tests
movb_nullified_tests
	movb,n %r4,%r26,movb_tests
	movb,=,n %r4,%r26,movb_tests
	movb,<,n %r4,%r26,movb_tests
	movb,od,n %r4,%r26,movb_tests
	movb,tr,n %r4,%r26,movb_tests
	movb,<>,n %r4,%r26,movb_tests
	movb,>=,n %r4,%r26,movb_tests
	movb,ev,n %r4,%r26,movb_tests

movib_tests
	movib 5,%r26,movib_tests
	movib,= 5,%r26,movib_tests
	movib,< 5,%r26,movib_tests
	movib,od 5,%r26,movib_tests
	movib,tr 5,%r26,movib_tests
	movib,<> 5,%r26,movib_tests
	movib,>= 5,%r26,movib_tests
	movib,ev 5,%r26,movib_tests
movib_nullified_tests
	movib,n 5,%r26,movib_tests
	movib,=,n 5,%r26,movib_tests
	movib,<,n 5,%r26,movib_tests
	movib,od,n 5,%r26,movib_tests
	movib,tr,n 5,%r26,movib_tests
	movib,<>,n 5,%r26,movib_tests
	movib,>=,n 5,%r26,movib_tests
	movib,ev,n 5,%r26,movib_tests

comb_tests_1
	comb %r0,%r4,comb_tests_1
	comb,= %r0,%r4,comb_tests_1
	comb,< %r0,%r4,comb_tests_1
	comb,<= %r0,%r4,comb_tests_1
	comb,<< %r0,%r4,comb_tests_1
	comb,<<= %r0,%r4,comb_tests_1
	comb,sv %r0,%r4,comb_tests_1
	comb,od %r0,%r4,comb_tests_1

comb_tests_2
	comb,tr %r0,%r4,comb_tests_2
	comb,<> %r0,%r4,comb_tests_2
	comb,>= %r0,%r4,comb_tests_2
	comb,> %r0,%r4,comb_tests_2
	comb,>>= %r0,%r4,comb_tests_2
	comb,>> %r0,%r4,comb_tests_2
	comb,nsv %r0,%r4,comb_tests_2
	comb,ev %r0,%r4,comb_tests_2

comb_nullified_tests_1
	comb,n %r0,%r4,comb_tests_1
	comb,=,n %r0,%r4,comb_tests_1
	comb,<,n %r0,%r4,comb_tests_1
	comb,<=,n %r0,%r4,comb_tests_1
	comb,<<,n %r0,%r4,comb_tests_1
	comb,<<=,n %r0,%r4,comb_tests_1
	comb,sv,n %r0,%r4,comb_tests_1
	comb,od,n %r0,%r4,comb_tests_1

comb_nullified_tests_2
	comb,tr,n %r0,%r4,comb_tests_2
	comb,<>,n %r0,%r4,comb_tests_2
	comb,>=,n %r0,%r4,comb_tests_2
	comb,>,n %r0,%r4,comb_tests_2
	comb,>>=,n %r0,%r4,comb_tests_2
	comb,>>,n %r0,%r4,comb_tests_2
	comb,nsv,n %r0,%r4,comb_tests_2
	comb,ev,n %r0,%r4,comb_tests_2

comib_tests_1
	comib 0,%r4,comib_tests_1
	comib,= 0,%r4,comib_tests_1
	comib,< 0,%r4,comib_tests_1
	comib,<= 0,%r4,comib_tests_1
	comib,<< 0,%r4,comib_tests_1
	comib,<<= 0,%r4,comib_tests_1
	comib,sv 0,%r4,comib_tests_1
	comib,od 0,%r4,comib_tests_1

comib_tests_2
	comib,tr 0,%r4,comib_tests_2
	comib,<> 0,%r4,comib_tests_2
	comib,>= 0,%r4,comib_tests_2
	comib,> 0,%r4,comib_tests_2
	comib,>>= 0,%r4,comib_tests_2
	comib,>> 0,%r4,comib_tests_2
	comib,nsv 0,%r4,comib_tests_2
	comib,ev 0,%r4,comib_tests_2

comib_nullified_tests_1
	comib,n 0,%r4,comib_tests_1
	comib,=,n 0,%r4,comib_tests_1
	comib,<,n 0,%r4,comib_tests_1
	comib,<=,n 0,%r4,comib_tests_1
	comib,<<,n 0,%r4,comib_tests_1
	comib,<<=,n 0,%r4,comib_tests_1
	comib,sv,n 0,%r4,comib_tests_1
	comib,od,n 0,%r4,comib_tests_1

comib_nullified_tests_2
	comib,tr,n 0,%r4,comib_tests_2
	comib,<>,n 0,%r4,comib_tests_2
	comib,>=,n 0,%r4,comib_tests_2
	comib,>,n 0,%r4,comib_tests_2
	comib,>>=,n 0,%r4,comib_tests_2
	comib,>>,n 0,%r4,comib_tests_2
	comib,nsv,n 0,%r4,comib_tests_2
	comib,ev,n 0,%r4,comib_tests_2

addb_tests_1
	addb %r1,%r4,addb_tests_1
	addb,= %r1,%r4,addb_tests_1
	addb,< %r1,%r4,addb_tests_1
	addb,<= %r1,%r4,addb_tests_1
	addb,nuv %r1,%r4,addb_tests_1
	addb,znv %r1,%r4,addb_tests_1
	addb,sv %r1,%r4,addb_tests_1
	addb,od %r1,%r4,addb_tests_1

addb_tests_2
	addb,tr %r1,%r4,addb_tests_2
	addb,<> %r1,%r4,addb_tests_2
	addb,>= %r1,%r4,addb_tests_2
	addb,> %r1,%r4,addb_tests_2
	addb,uv %r1,%r4,addb_tests_2
	addb,vnz %r1,%r4,addb_tests_2
	addb,nsv %r1,%r4,addb_tests_2
	addb,ev %r1,%r4,addb_tests_2

addb_nullified_tests_1
	addb,n %r1,%r4,addb_tests_1
	addb,=,n %r1,%r4,addb_tests_1
	addb,<,n %r1,%r4,addb_tests_1
	addb,<=,n %r1,%r4,addb_tests_1
	addb,nuv,n %r1,%r4,addb_tests_1
	addb,znv,n %r1,%r4,addb_tests_1
	addb,sv,n %r1,%r4,addb_tests_1
	addb,od,n %r1,%r4,addb_tests_1

addb_nullified_tests_2
	addb,tr,n %r1,%r4,addb_tests_2
	addb,<>,n %r1,%r4,addb_tests_2
	addb,>=,n %r1,%r4,addb_tests_2
	addb,>,n %r1,%r4,addb_tests_2
	addb,uv,n %r1,%r4,addb_tests_2
	addb,vnz,n %r1,%r4,addb_tests_2
	addb,nsv,n %r1,%r4,addb_tests_2
	addb,ev,n %r1,%r4,addb_tests_2

addib_tests_1
	addib -1,%r4,addib_tests_1
	addib,= -1,%r4,addib_tests_1
	addib,< -1,%r4,addib_tests_1
	addib,<= -1,%r4,addib_tests_1
	addib,nuv -1,%r4,addib_tests_1
	addib,znv -1,%r4,addib_tests_1
	addib,sv -1,%r4,addib_tests_1
	addib,od -1,%r4,addib_tests_1

addib_tests_2
	addib,tr -1,%r4,addib_tests_2
	addib,<> -1,%r4,addib_tests_2
	addib,>= -1,%r4,addib_tests_2
	addib,> -1,%r4,addib_tests_2
	addib,uv -1,%r4,addib_tests_2
	addib,vnz -1,%r4,addib_tests_2
	addib,nsv -1,%r4,addib_tests_2
	addib,ev -1,%r4,addib_tests_2

addib_nullified_tests_1
	addib,n -1,%r4,addib_tests_1
	addib,=,n -1,%r4,addib_tests_1
	addib,<,n -1,%r4,addib_tests_1
	addib,<=,n -1,%r4,addib_tests_1
	addib,nuv,n -1,%r4,addib_tests_1
	addib,znv,n -1,%r4,addib_tests_1
	addib,sv,n -1,%r4,addib_tests_1
	addib,od,n -1,%r4,addib_tests_1

addib_nullified_tests_2
	addib,tr,n -1,%r4,addib_tests_2
	addib,<>,n -1,%r4,addib_tests_2
	addib,>=,n -1,%r4,addib_tests_2
	addib,>,n -1,%r4,addib_tests_2
	addib,uv,n -1,%r4,addib_tests_2
	addib,vnz,n -1,%r4,addib_tests_2
	addib,nsv,n -1,%r4,addib_tests_2
	addib,ev,n -1,%r4,addib_tests_2


; Needs to check lots of stuff (like corner bit cases)
bb_tests
	bvb,< %r4,bb_tests
	bvb,>= %r4,bb_tests
	bvb,<,n %r4,bb_tests
	bvb,>=,n %r4,bb_tests
	bb,< %r4,5,bb_tests
	bb,>= %r4,5,bb_tests
	bb,<,n %r4,5,bb_tests
	bb,>=,n %r4,5,bb_tests
	
; Computational instructions
add_tests
	add  %r4,%r5,%r6
	add,=  %r4,%r5,%r6
	add,<  %r4,%r5,%r6
	add,<=  %r4,%r5,%r6
	add,nuv  %r4,%r5,%r6
	add,znv  %r4,%r5,%r6
	add,sv  %r4,%r5,%r6
	add,od  %r4,%r5,%r6
	add,tr  %r4,%r5,%r6
	add,<>  %r4,%r5,%r6
	add,>=  %r4,%r5,%r6
	add,>  %r4,%r5,%r6
	add,uv  %r4,%r5,%r6
	add,vnz  %r4,%r5,%r6
	add,nsv  %r4,%r5,%r6
	add,ev  %r4,%r5,%r6

addl_tests
	addl  %r4,%r5,%r6
	addl,=  %r4,%r5,%r6
	addl,<  %r4,%r5,%r6
	addl,<=  %r4,%r5,%r6
	addl,nuv  %r4,%r5,%r6
	addl,znv  %r4,%r5,%r6
	addl,sv  %r4,%r5,%r6
	addl,od  %r4,%r5,%r6
	addl,tr  %r4,%r5,%r6
	addl,<>  %r4,%r5,%r6
	addl,>=  %r4,%r5,%r6
	addl,>  %r4,%r5,%r6
	addl,uv  %r4,%r5,%r6
	addl,vnz  %r4,%r5,%r6
	addl,nsv  %r4,%r5,%r6
	addl,ev  %r4,%r5,%r6

addo_tests
	addo  %r4,%r5,%r6
	addo,=  %r4,%r5,%r6
	addo,<  %r4,%r5,%r6
	addo,<=  %r4,%r5,%r6
	addo,nuv  %r4,%r5,%r6
	addo,znv  %r4,%r5,%r6
	addo,sv  %r4,%r5,%r6
	addo,od  %r4,%r5,%r6
	addo,tr  %r4,%r5,%r6
	addo,<>  %r4,%r5,%r6
	addo,>=  %r4,%r5,%r6
	addo,>  %r4,%r5,%r6
	addo,uv  %r4,%r5,%r6
	addo,vnz  %r4,%r5,%r6
	addo,nsv  %r4,%r5,%r6
	addo,ev  %r4,%r5,%r6

addc_tests
	addc  %r4,%r5,%r6
	addc,=  %r4,%r5,%r6
	addc,<  %r4,%r5,%r6
	addc,<=  %r4,%r5,%r6
	addc,nuv  %r4,%r5,%r6
	addc,znv  %r4,%r5,%r6
	addc,sv  %r4,%r5,%r6
	addc,od  %r4,%r5,%r6
	addc,tr  %r4,%r5,%r6
	addc,<>  %r4,%r5,%r6
	addc,>=  %r4,%r5,%r6
	addc,>  %r4,%r5,%r6
	addc,uv  %r4,%r5,%r6
	addc,vnz  %r4,%r5,%r6
	addc,nsv  %r4,%r5,%r6
	addc,ev  %r4,%r5,%r6

addco_tests
	addco  %r4,%r5,%r6
	addco,=  %r4,%r5,%r6
	addco,<  %r4,%r5,%r6
	addco,<=  %r4,%r5,%r6
	addco,nuv  %r4,%r5,%r6
	addco,znv  %r4,%r5,%r6
	addco,sv  %r4,%r5,%r6
	addco,od  %r4,%r5,%r6
	addco,tr  %r4,%r5,%r6
	addco,<>  %r4,%r5,%r6
	addco,>=  %r4,%r5,%r6
	addco,>  %r4,%r5,%r6
	addco,uv  %r4,%r5,%r6
	addco,vnz  %r4,%r5,%r6
	addco,nsv  %r4,%r5,%r6
	addco,ev  %r4,%r5,%r6

sh1add_tests
	sh1add  %r4,%r5,%r6
	sh1add,=  %r4,%r5,%r6
	sh1add,<  %r4,%r5,%r6
	sh1add,<=  %r4,%r5,%r6
	sh1add,nuv  %r4,%r5,%r6
	sh1add,znv  %r4,%r5,%r6
	sh1add,sv  %r4,%r5,%r6
	sh1add,od  %r4,%r5,%r6
	sh1add,tr  %r4,%r5,%r6
	sh1add,<>  %r4,%r5,%r6
	sh1add,>=  %r4,%r5,%r6
	sh1add,>  %r4,%r5,%r6
	sh1add,uv  %r4,%r5,%r6
	sh1add,vnz  %r4,%r5,%r6
	sh1add,nsv  %r4,%r5,%r6
	sh1add,ev  %r4,%r5,%r6

sh1addl_tests
	sh1addl  %r4,%r5,%r6
	sh1addl,=  %r4,%r5,%r6
	sh1addl,<  %r4,%r5,%r6
	sh1addl,<=  %r4,%r5,%r6
	sh1addl,nuv  %r4,%r5,%r6
	sh1addl,znv  %r4,%r5,%r6
	sh1addl,sv  %r4,%r5,%r6
	sh1addl,od  %r4,%r5,%r6
	sh1addl,tr  %r4,%r5,%r6
	sh1addl,<>  %r4,%r5,%r6
	sh1addl,>=  %r4,%r5,%r6