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📄 e2rom.c

📁 TMS320F2812源代码“e2rom”希望对大家有帮助
💻 C
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#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File
#include "f2812a.h"
// Prototype statements for functions found within this file.
// interrupt void ISRTimer2(void);
void delay_loop(void);
void spi_xmit(Uint16 a);
void spi_fifo_init(void);
void spi_init(void);
void error(void);
void eeprom_error(void);
void eeprom_cs_on( void );
void eeprom_cs_off( void );
int eeprom_wait( void );
int rd_eeprom_byte( unsigned short , unsigned short * );
int wr_eeprom_byte( unsigned short , unsigned short * );
int txmt_spi_byte( unsigned short  , unsigned short * );

#define EE_TEST_BUFF_SIZE	32
#define SPI_GOOD   1 
#define SPI_ERROR  0
unsigned short write_buff[EE_TEST_BUFF_SIZE];
unsigned short read_buff[EE_TEST_BUFF_SIZE];
void main(void)
{

   int i;
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP281x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO: 
// This example function is found in the DSP281x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();  // Skipped for this example  
// Setup only the GP I/O only for SPI functionality
   EALLOW;
   GpioMuxRegs.GPFMUX.all=0x0007;	// Select GPIOs to be SPI pins	 
   GpioMuxRegs.GPFDIR.bit.GPIOF3=1;									// Port F MUX - x000 0000 0000 1111
   EDIS;
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts 
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.  
// This function is found in the DSP281x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;
   
// Initialize the PIE vector table with pointers to the shell Interrupt 
// Service Routines (ISR).  
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP281x_DefaultIsr.c.
// This function is found in DSP281x_PieVect.c.
   InitPieVectTable();
	
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP281x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   spi_init();
  

// Step 5. User specific code:
// Interrupts are not used in this example. 
    

     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {
	 read_buff[i] = 0;
	 write_buff[i] = (4*i) +i;

     }


     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {
       
	   wr_eeprom_byte( i, &write_buff[i] );
     }


     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {

	 rd_eeprom_byte( i, &read_buff[i] );
     }



     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {

	 if ( read_buff[i] != write_buff[i] )
	 {
	     eeprom_error();

	 }
     }
   for(;;);
   
} 	


// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:	

void delay_loop()
{
    long      i;
    for (i = 0; i < 1000000; i++) {}
}


void error(void)
{
    asm("     ESTOP0");						// Test failed!! Stop!
    for (;;);
}

void spi_init()
{    
	
	SPI_OE=1;                                    //Enabled SPI and X25650 Chip Connect
	SpiaRegs.SPICCR.all =0x0007;	             // Reset on, rising edge, 16-bit char bits  
	SpiaRegs.SPICTL.all =0x000e;    		     // Enable master mode, normal phase,
    SpiaRegs.SPIBRR =0x007F;									
    SpiaRegs.SPICCR.all =0x0087;		         // Relinquish SPI from Reset   
    SpiaRegs.SPIPRI.bit.FREE = 1;                // Set so breakpoints don't disturb xmission
}

void spi_xmit(Uint16 a)
{
    SpiaRegs.SPITXBUF=a;
}    

void spi_fifo_init()										
{
	SPI_OE=1;                                    //Enabled SPI and X25650 Chip Connect
	eeprom_cs_off();
	SpiaRegs.SPICCR.all =0x0007;	             // Reset on, rising edge, 16-bit char bits  
	SpiaRegs.SPICTL.all =0x000e;    		     // Enable master mode, normal phase,
                                                 // enable talk, and SPI int disabled.
	SpiaRegs.SPIBRR =0x007F;									
    SpiaRegs.SPICCR.all =0x0087;		         // Relinquish SPI from Reset   
    SpiaRegs.SPIPRI.bit.FREE = 1;                // Set so breakpoints don't disturb xmission
}  

//===========================================================================
// No more.
//===========================================================================
void eeprom_error(void)
{
    for(;;);
}

void eeprom_cs_on( void )
{
    GpioDataRegs.GPFCLEAR.bit.GPIOF3=1;
}
void eeprom_cs_off( void )
{
    GpioDataRegs.GPFSET.bit.GPIOF3=1;
}
int eeprom_wait( void )
{
   int i;
   int j;

   j = 0;

   for( i = 0; i < 10; i++ )
   {
       j+=i;
   }

   return( j );
}

int rd_eeprom_byte( unsigned short address, unsigned short *rd_data )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( READ_EE_INSTR, &dummy );

    /* Send Read Address to SPI */

    txmt_spi_byte( (address >> 8  ), &dummy );
    txmt_spi_byte( (address & 0xff), &dummy );

    /* Get Word from SPI */

    txmt_spi_byte( DUMMY_WRITE, &dummy );

    *rd_data = dummy;


    eeprom_cs_off();

    return( EEPROM_GOOD );

}



int rd_eeprom_status( unsigned short *status )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( RDSR_EE_INSTR, &dummy );

    /* Read Status from SPI */

    txmt_spi_byte( DUMMY_WRITE, &dummy );

    *status = dummy;


    eeprom_cs_off();

    return( EEPROM_GOOD );


}


int wr_eeprom_status( unsigned short *status )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( WRSR_EE_INSTR, &dummy );

    /* Read Status from SPI */

    dummy = *status;

    txmt_spi_byte( DUMMY_WRITE, &dummy );


    eeprom_cs_off();

    return( EEPROM_GOOD );


}



int wr_eeprom_we_latch( void )
{
    unsigned short dummy;



    /* Send Read Command to SPI*/
    eeprom_cs_on();

    txmt_spi_byte( WREN_EE_INSTR, &dummy );

    eeprom_cs_off();

    return( EEPROM_GOOD );


}





int wr_eeprom_byte( unsigned short address, unsigned short *data )
{

     unsigned short dummy;
     unsigned short write_data;
     unsigned short status_reg;
     




    /* Send Write Latch Enable to SPI*/

    wr_eeprom_we_latch();

    eeprom_wait();


    eeprom_cs_on();


    /* Send Write Command to SPI*/

    txmt_spi_byte( WRITE_EE_INSTR, &dummy );

    /* Send Read Address to SPI */

    txmt_spi_byte( address>>8 ,  &dummy );
    txmt_spi_byte( (address&0xff),&dummy );

    /* Write Byte from SPI */

    write_data = *data;

    txmt_spi_byte( write_data, &dummy );


    eeprom_cs_off();



    /* WIP not ready?? Then Wait */

    do
    {
	rd_eeprom_status( &status_reg );
	eeprom_wait();

    }while( status_reg & EE_WIP );


    return( EEPROM_GOOD );


}


int txmt_spi_byte( unsigned short tx_data, unsigned short *rcv_data )
{
    int timer;
    int spi_status;
    unsigned short txmt_buf;

    txmt_buf = tx_data << 8;


    SpiaRegs.SPITXBUF = txmt_buf;

    timer = 0x7fff;

    while( timer-- )
    {

	spi_status = SpiaRegs.SPISTS.bit.INT_FLAG;

	/* Check for SPI INT for completion */

	if( spi_status == 1 )
	{
	     break;
	}
    }



    if( timer )
    {
	 *rcv_data = SpiaRegs.SPIRXBUF;

	 return ( SPI_GOOD );
    }
    else
    {
	return( SPI_ERROR );
    }
}

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