config.h

实现基于ip2022的MPEG2 TS的IP组播接收

#ifndef _CONFIG_H_
#define _CONFIG_H_

/* Section: Debugging */

/* Debugging enabled */
#define DEBUG 1

/* Use assertions */
#define USE_ASSERTIONS 1

/* Section: Internal settings */

/* Original file name */
#define PKG_FILE_NAME "Template.lpj"

/* Architecture */
#define ARCH IP2K

/* Package: ipEthMux - Ethernet-style muliplexer/demultiplexer */
#define IPETHMUX 1

/* Version */
#define IPETHMUX_PKG_VERSION "${VERSION}"

/* Enable runtime debugging */

/* Enable 802.2 LLC frames */

/* Support NAT and/or packet filters */

/* Package: ipEthernet - Serializer Ethernet for IP2K */
#define IPETHERNET 1

/* Version */
#define IPETHERNET_PKG_VERSION "${VERSION}"

/* Ethernet Statistics */

/* Pad TX Frame to Even Size */

/* Flow control (half duplex) */

/* Receive Offset */
#define IPETHERNET_RECEIVE_OFFSET 0

/* Reserved netpages */
#define IPETHERNET_RESERVED_NETPAGE 0

/* Multiple instances */
#define IPETHERNET_MI_ENABLED 1

/* eth0_Use Serializer 1 */
#define eth0_USE_S1_FOR_ETHERNET 1

/* eth0_Link LED */
#define eth0__S1_IPETHERNET_LINK_LED 1

/* eth0_Port */
#define eth0__S1_IPETHERNET_LINK_LED_PORT RE

/* eth0_Pin */
#define eth0__S1_IPETHERNET_LINK_LED_PIN 1

/* eth0_Active High */
#define eth0__S1_IPETHERNET_LINK_LED_HIGH 1

/* eth0_Activity LED */
#define eth0__S1_IPETHERNET_ACTIVITY_LED 1

/* eth0_Port */
#define eth0__S1_IPETHERNET_ACTIVITY_LED_PORT RE

/* eth0_Pin */
#define eth0__S1_IPETHERNET_ACTIVITY_LED_PIN 0

/* eth0_Active High */
#define eth0__S1_IPETHERNET_ACTIVE_LED_HIGH 1

/* eth0_Collision LED */
#define eth0__S1_IPETHERNET_COLLISION_LED 1

/* eth0_Port */
#define eth0__S1_IPETHERNET_COLLISION_LED_PORT RE

/* eth0_Pin */
#define eth0__S1_IPETHERNET_COLLISION_LED_PIN 2

/* eth0_Active High */
#define eth0__S1_IPETHERNET_COLLISION_LED_HIGH 1

/* eth0_Combo Activity/Link LED */

/* eth0_Use Serializer 2 */

/* Section: eth0_RX polarity setting */

/* eth0_Normal RX polarity */
#define eth0__ETH_RX_NORMAL_POLARITY 1

/* eth0_Reversed RX polarity */

/* eth0_Dynamic RX polarity */

/* eth0_Rx address pointer */
#define eth0_ETH_RX_ADDR_PTR 0

/* eth0_Tx address pointer */
#define eth0_ETH_TX_ADDR_PTR 1

/* eth0_RX Netpages */
#define eth0_IPETHERNET_RX_NETPAGES 8

/* eth0_TX Buffered Frames */
#define eth0_IPETHERNET_TX_FRAMES 2

/* eth0_Timing Compensation */
#define eth0_IPETHERNET_TIMING_COMP 1

/* eth0_Timer 1 */

/* eth0_Timer 2 */
#define eth0_IPETHERNET_TIMING_COMP_USE_TIMER2 1

/* Debug Message Printing */

/* Package: ipHAL - ip2k */
#define IPHAL 1

/* Section: Package Options */

/* Version */
#define IPHAL_PKG_VERSION "${VERSION}"

/* OSC1 frequency */
#define OSC1_FREQ 4800000

/* System clock frequency */
#define SYSTEM_FREQ 120000000

/* Serial PLL frequency */
#define SERPLL_FREQ 240000000

/* Initialize pram from filemedia */

/* Upgrade Support */

/* ADC */

/* Latch */
#define USE_LATCH 1

/* D to Q Propagation Time [ns] */
#define LATCH_PROPAGATION_TIME_NS 15

/* LE Setup Time [ns] */
#define LATCH_SETUP_TIME_NS 6

/* LE Hold Time [ns] */
#define LATCH_HOLD_TIME_NS 1

/* Data Port */
#define LATCH_DATA_PORT RD

/* LE Port */
#define LATCH_LE_PORT RB

/* LE Pin */
#define LATCH_LE_PIN 6

/* External SRAM */
#define USE_EXTMEM 1

/* Access Time [ns] */
#define EXTMEM_ACCESS_NS 25

/* Bus release Time [ns] */
#define EXTMEM_BUS_RELEASE_NS 7

/* CS Port */
#define EMCS_PORT RB

/* CS Pin */
#define EMCS_PIN 3

/* Watchdog */

/* Section: OS Timer */

/* RTTMR */

/* TMR1 */
#define USE_TMR1_FOR_OSTIMER 1

/* TMR2 */

/* Tick rate */
#define TICK_RATE 1000

/* Section: Netpages */

/* Use internal PRAM for netpages */
#define USE_PRAM_FOR_NETPAGES 1

/* Use external SRAM for netpages */

/* CRC32 LFSR Block */
#define APP_LFSR_CRC32 3

/* Section: Debugging */

/* Use debug LEDs */
#define USE_DEBUG_LEDS 1

/* Debug lights port */
#define DEBUG_LIGHTS_PORT RB

/* Use debug serial interface */

/* Break on NULL callback */
#define DEBUG_BREAK_AT_ZERO 1

/* Break if main returns */
#define DEBUG_BREAK_IF_MAIN_RETURNS 1

/* Enable debug time headers */

/* Architecture Extension */
#define IP2022 1

/* Enable runtime debugging */

/* ISR */
#define IPHAL_ISR_CODE 1

/* TMR0 */
#define IPHAL_ISR_TMR0_ENABLED 1

/* Interrupt frequency */
#define TMR0_INT_FREQ 460800

/* Prescale */
#define TMR0_PRESCALE 2

/* ISR Cycle Count */

/* DSR */

/* ip2kvm support */

/* Package: ipLibC - Standard C library */
#define IPLIBC 1

/* Version */
#define IPLIBC_PKG_VERSION "${VERSION}"

/* Package: ipOS - Operating System */
#define IPOS 1

/* Section: Package Options */

/* Version */
#define IPOS_PKG_VERSION "${VERSION}"

/* Section: Memory (heap) */

/* Default stack size */
#define DEFAULT_STACK_SIZE 0x280

/* Best-fit algorithm */
#define IPOS_HEAP_BEST_FIT 1

/* First-fit algorithm */

/* Enable heap debugging. */
#define HEAP_DEBUG 1

/* Paint block when allocated */
#define IPOS_HEAP_PAINT_BLOCK_ON_ALLOC 1

/* Clear block when freed */
#define IPOS_HEAP_CLEAR_BLOCK_ON_FREE 1

/* Guard band size */
#define IPOS_HEAP_GUARD_BAND_SIZE 2

/* Section: Netbufs */

/* Enable netpage debugging */

/* Enable netbuf debugging */
#define NETBUF_DEBUG 1

/* Enable netbuf exceptions */

/* Accelerate core netpage functions */
#define NETPAGE_ACCELERATED_FUNCTIONS 1

/* Accelerate core netbuf functions */
#define NETBUF_ACCELERATED_FUNCTIONS 1

/* Maximum number of netpages per netbuf */
#define NETBUF_PAGES 8

/* Allow sequential pages */

/* Dynamically linked libraries */

/* Enable runtime debugging */
#define IPOS_DEBUG 1

/* Section: Oneshot Timers */

/* Enable oneshot debugging */

/* Package: ipStack - TCP/IP Core */
#define IPSTACK 1

/* Version */
#define IPSTACK_PKG_VERSION "${VERSION}"

/* Enable runtime debugging */
#define IPSTACK_DEBUG 1

/* Section: Internet Protocol (IP) */

/* Enable IP routing */

/* Enable IP runtime debugging */

/* Accelerate IP routing */

/* Enable datagram reassembly */

/* Enable extended route information */

/* Section: Internet Control Message Protocol (ICMP) */

/* Propagate ICMP messages */
#define ICMP_PROPAGATE_ICMP 1

/* Transmission Control Protocol (TCP) */
#define TCP_ENABLED 1

/* Enable TCP runtime debugging */

/* TCP close timeout */
#define TCP_CLOSE_TIMEOUT 60

/* Send RST for connection to unused port */

/* Allow 4-way handshake for connection */

/* Propagate ICMP messages */
#define TCP_PROPAGATE_ICMP 1

/* Machine Space */
#define IPSTACK_TCP_MACHINE_SPACE NATIVE

/* Send keep-alive segments */

/* Retransmission timeout */

/* User Datagram Protocol (UDP) */
#define UDP_ENABLED 1

/* Enable UDP runtime debugging */

/* Compute UDP Checksum */
#define UDP_COMPUTE_CHECKSUM 1

/* Propagate ICMP messages */
#define UDP_PROPAGATE_ICMP 1

/* Machine Space */
#define IPSTACK_UDP_MACHINE_SPACE NATIVE

/* Enable VM clients */
#define IPSTACK_UDP_VM_CLIENTS 1

/* Enable fast IP checksumming */
#define IP_FAST_CSUM 1

/* Default gateway */
#define DEFAULT_GW_ENABLED 1

/* Default gateway address */
#define DEFAULT_GW_ADDR 0x0A010101

/* Section: IP Datalink Layers */

/* Serial Link Interface Protocol (SLIP) */

/* Ethernet link layer enabled */
#define ETHERNET_ENABLED 1

/* Local IP address */
#define ETH_LOCAL_IP_ADDRESS 0xC0A801c9

/* Local IP subnet mask */
#define ETH_LOCAL_IP_SUBNET 0xFFFFFF00

/* ARP cache entry lifetime */
#define ARP_CACHE_ENTRY_LIFETIME 60

/* Support runtime statistics */

/* Package: ipTime - Time of Day Support */
#define IPTIME 1

/* Version */
#define IPTIME_PKG_VERSION "${VERSION}"

/* Enable Runtime Debugging */
#define IPTIME_DEBUG 1

/* Simple Network Time Protocol (SNTP) */
#define SNTP_ENABLED 1

/* Server IP Address */
#define SNTP_SERVER_IP_ADDRESS 0xc0a80190

/* Timer server protocol version */
#define SNTP_SERVER_VERSION 4

/* Timeout */
#define SNTP_TIMEOUT 3

/* Package: ipUART - Serial UARTs */
#define IPUART 1

/* Version */
#define IPUART_PKG_VERSION "${VERSION}"

/* Software VP */
#define UART_VP_ENABLED 1

/* echo_Baud Rate */
#define echo_UART_VP_BAUDRATE 115200

/* echo_Enable hardware handshaking */
#define echo_UART_VP_USE_HS 1

/* Section: echo_Transmit */

/* echo_TX handshaking invert */

/* echo_TX handshaking pin */
#define echo_UART_VP_TX_HS_PIN 2

/* echo_TX handshaking port */
#define echo_UART_VP_TX_HS_PORT RC

/* Section: echo_Receive */

/* echo_Handshaking low water mark */
#define echo_UART_VP_LOW_WATER 16

/* echo_RX handshaking invert */

/* echo_RX handshaking pin */
#define echo_UART_VP_RX_HS_PIN 1

/* echo_RX handshaking port */
#define echo_UART_VP_RX_HS_PORT RC

/* echo_TX FIFO size */
#define echo_UART_VP_TX_FIFO_SIZE 128

/* echo_TX port */
#define echo_UART_VP_TX_PORT RF

/* echo_TX pin */
#define echo_UART_VP_TX_PIN 1

/* echo_RX FIFO Size */
#define echo_UART_VP_RX_FIFO_SIZE 128

/* echo_RX port */
#define echo_UART_VP_RX_PORT RF

/* echo_RX pin */
#define echo_UART_VP_RX_PIN 7

/* echo_Enable DCD input */

/* Enable Runtime Debugging */

#endif /* _CONFIG_H_ */