aal2rxtxbyte.c

摩托罗拉Motolola公司网络处理器C3的示范代码.实现了ATM的AAL2层交换功能.想了解网络处理器的可以

/*****************************************************************************
* Copyright (c) 1998, 1999, 2000, 2001, 2002 C-Port Corporation, a Motorola Company
* All Rights Reserved
*
* The information contained in this file is C-Port Corporation confidential 
* and proprietary. Any reproduction, use or disclosure, in whole or in part, 
* of this program, including any attempt to obtain a human-readable version 
* of this program, without the express, prior written consent of C-Port
* Corporation or Motorola Incorporated is strictly prohibited.
 *****************************************************************************/
#define TXBYTE
/*---------------------------------------------------------------------------*/
#include <sdpUcode.h>
#include <dcpRegistersCp.h>
#include <rcSdpAal2TxApiIf.h>
#include <rcSdpAal2RxApiIf.h>
#include <stdio.h>
/*---------------------------------------------------------------------------*/
#define TXBYTECTL ((int) &((SdpTxCregs*)NULL)->txCtl.byte)
#define ATM_CELL_PAYLD_SZ 48

/**********************************************************************
 * TxByte Functionality
 *
 * The TxByte processor is responsible for the following:
 * Insertion of partial header bytes (if any) from merge space registers
 * to the data stream.
 * Insertion of partial payload bytes (if any) from merge space registers
 * to the data stream
 * Transmission of cell payload to RxSDP.
 * End of cell signaling to RxSDP
 **********************************************************************/

void
SDPmain()
{
    Description = ("AAL2 Ucode for the SDP TX Byte Processor.");

   /*
    * Keep polling the TxStatus Register
    */

LabelDef(START_PROC);
    DCPSIM_MESSAGE(START_PROC);
    CregsAddrWrite(TXSTATUS);
    Branch(ALWAYS, Upc+1);                   // Upc = 1
    Branch(ALWAYS, Upc+1); /* One Wait cycle */ // Upc = 2

LabelDef(MERGE_POLL_LOOP);

    Abus(Creg);
    Bbus(Literal(0x80));
    ALU(AND);
    Branch(ALWAYS, Upc+1);                   // Upc = 3
    Branch(ALUneg, Label(MERGE_POLL_LOOP));  // Upc = 4

   /*
    * Process the Flag byte to find out the number of
    * header bytes to send
    */

LabelDef(FLAG_PROC);

    DCPSIM_MESSAGE(GOT_MERGE_FROM_RC);
   /*
    * CregAddr := Address of (TxSDPn_Merge0[31:24])
    */
    CregsAddrWrite(AAL2_MERGE_OFFSET(first_byte));
    Branch(ALWAYS,Upc+1) ;                  // Upc = 5
    Branch(ALWAYS,Upc+1); /* wait cycle */  // Upc = 6

    CregToIreg(Ireg0);
    PayloadOut(ALUout);
    Branch(ALWAYS,Upc+1);                   // Upc = 7

   /*
    * Get the byte stored in Ireg0, AND it with 0x03
    * and store the result back in Ireg1. This is because the
    * 2 LSB constitute the flag to find the number of header
    * bytes following it.
    */
    Abus(Literal(0x03));
    Bbus(IregsB(Ireg0));
    IregsA(Ireg1);
    Actions(IregsAwrite);
    ALU(AND);
    Branch(ALWAYS,Upc+1);                    // Upc = 8

   /*
    * Send out the partial header bytes, if any
    */

   /*
    * Compare Ireg1 with value 0.
    * If so, Process the partial payload.
    */
    IregCompareLit(Ireg1,0);
    Branch(ALWAYS,Upc+1);                    // Upc = 9
    Branch(ALUzero,Label(TRANSFER_PART_PAYLOAD)); // Upc = 10
   /*
    * CregAddr := Address of (TxSDPn_Merge0[23:16])
    */
    Actions(CregAddrIncr);
    Branch(ALWAYS,Upc+1);                    // Upc = 11
   /*
    * Compare Ireg1 with value 1
    */
    IregCompareLit(Ireg1,1);
    Branch(ALWAYS,Upc+1);                    // Upc = 12
    Branch(ALUzero,Label(ONE_PARTIAL_HDR));  // Upc = 13

   /*
    * Compare Ireg1 with value 2
    */
    IregCompareLit(Ireg1,2);
    Branch(ALWAYS,Upc+1);                    // Upc = 14
    Branch(ALUzero,Label(TWO_PARTIAL_HDR));  // Upc = 15

   /*
    * Control should never reach here.
    * If control reaches here, then number of
    * partial header bytes is three,
    * which cannot be true. In case, it is true-what to do ?
    */
    DCPSIM_MESSAGE(THREE_PARTIAL_HDR);

LabelDef(ONE_PARTIAL_HDR);
    DCPSIM_MESSAGE(ONE_PARTIAL_HDR);
   /*
    * Get the CID info stored in TxSDPn_Merge Space(23:16)
    * and transmit it to RxSDP.
    */
    Abus(Creg);
    ALU(PassA);
    PayloadOut(ALUout);
    Branch(ALWAYS,Label(TRANSFER_ATM_PAY_MINUS_STF)); // Upc = 16

LabelDef(TWO_PARTIAL_HDR);
    DCPSIM_MESSAGE(TWO_PARTIAL_HDR);
   /*
    * Get the CID info stored in TxSDPn_Merge Space(15:8)
    * and transmit it to RxSDP.
    */
    Abus(Creg);
    ALU(PassA);
    PayloadOut(ALUout);
    Branch(ALWAYS,Upc+1);                   // Upc = 17
   /*
    * CregAddr := Address of (TxSDPn_Merge0[15:8])
    */
    Actions(CregAddrIncr);
    Branch(ALWAYS,Upc+1);                   // Upc = 18
    Branch(ALWAYS,Upc+1); /* Wait of one cycle */   // Upc = 19

   /*
    * Get the LI_UUI info stored in TxSDPn_Merge Space(23:16)
    * and transmit it to RxSDP.
    */
    Abus(Creg);
    ALU(PassA);
    PayloadOut(ALUout);
    Branch(ALWAYS,Label(TRANSFER_ATM_PAY_MINUS_STF)); // Upc = 20

LabelDef(TRANSFER_PART_PAYLOAD);
    DCPSIM_MESSAGE(TRANSFER_PART_PAYLOAD);
   /*
    * Get OSF(STF) + No. of partial payload bytes unaligned
    * present in the DMEM. This information is stored in
    * TxSDPn_Merge1(Bits 5:0)
    */

   /*
    * CregAddr := Address of (TxSDPn_Merge1[31:24])
    */
    CregsAddrWrite(AAL2_MERGE_OFFSET(stfOffset));
    Branch(ALWAYS,Upc+1) ;                  // Upc = 21


   /*
    * Get the byte stored in Ireg0, AND it with 0xFC
    * and store the result back in Ireg3. This is because the
    * 6 MSB constitute the offset of STF.
    */
    Abus(Literal(0xFC));
    Bbus(IregsB(Ireg0));
    IregsA(Ireg3);
    Actions(IregsAwrite);
    ALU(AND);
    Branch(ALWAYS,Upc+1);                   // Upc = 22

   /*
    * The OSF field present in STF has been stored in
    * most significant six bits and hence, they have to
    * be right-shifted by two for computation purposes.
    */
    Bbus(IregsB(Ireg3));
    ALU(RotateB(2));
    IregsA(Ireg3);
    Actions(IregsAwrite);
    Branch(ALWAYS,Upc+1);                   // Upc = 23

    Abus(Creg);               // This contains the offset
    ALU(PassA);
    IregsA(Ireg4);
    Actions(IregsAwrite);
    Branch(ALWAYS, Upc+1);                  // Upc = 24

    Abus(IregsA(Ireg3));      // This contains the offset
    Bbus(IregsB(Ireg4));      // This contains the actual OSF
    ALU(SUB);                 // No. of partial payload bytes
    Actions(IregsAwrite);     // from the bufHandle in DMEM table.
    Branch(ALWAYS,Upc+1);                  // Upc = 25
    Branch(ALUzero,Label(TRANSFER_ATM_PAY_MINUS_STF)); // Upc = 26

/*
    Abus(IregsA(Ireg3));      // This contains the offset
    Bbus(Creg);               // This contains the actual STF
    Actions(IregsAwrite);
    ALU(SUB);                 // No. of partial payload bytes
    Branch(ALWAYS,Upc+1);     // from the bufHandle in DMEM table.
*/
   /*
    * TxSDPn_Merge2 contains the partial payload bytes information
    */

   /*
    * CregAddr := Address of (TxSDPn_Merge2[31:24])
    */
    CregsAddrWrite(AAL2_MERGE_OFFSET(payLoadWord1));
    Branch(ALWAYS,Upc+1) ;               // Upc = 27
    Branch(ALWAYS,Upc+1) ; /* Extra Wait Cycle */  // Upc = 28

   /*
    * Now Ireg3 contains the partial payload bytes information
    * Transfer Ireg3 bytes of information to the RxSDP
    */
   /*
    * CregAddr register points to the value of TxSDPn_Merge2
    * Get it's value and send it to Payload output.
    * Decrement Ireg3 every time it is done.
    * Keep doing this till Ireg3 is zero.
    */
LabelDef(CONTINUE_TRANSFER_PART_PAYLOAD);
    Abus(Creg);
    ALU(PassA);
    PayloadOut(ALUout);
    Actions(CregAddrIncr);
    Branch(ALWAYS,Upc+1);                        // Upc = 29

    IregSUBlit(Ireg3,1);
    Branch(ALWAYS,Upc+1);                        // Upc = 30

    BranchNot(ALUzero,Label(CONTINUE_TRANSFER_PART_PAYLOAD)); // Upc = 31

LabelDef(TRANSFER_ATM_PAY_MINUS_STF);

   /*
    * Initialize CellByteCnt to -48, because
    * STF has already been processed.
    */
    IregInit(CellByteCnt, -(ATM_CELL_PAYLD_SZ), UseAbus);
    Branch(ALWAYS, Upc+1);                      // Upc = 32
   /*
    * This is the STF Byte and hence, do not
    * transmit to TxSDP.
    */
    Actions(IregIncr(CellByteCnt)+UnloadFIFO);
    Branch(ALWAYS,Upc+1);                      // Upc = 33
   /*
    * Re-circulate the ATM Cell Payload minus the STF Byte to the TxSDP.
    */

LabelDef(CONTINUE_TR_CELL_PAYLOAD);
   /*
    * Increment the CregAddr Register and
    * Send the cell Payload - STF byte
    Actions(IregIncr(CellByteCnt)+UnloadFIFO+RepeatUntil);
    */
    Pbus(Payload);
    Actions(UnloadFIFO + DataOutValid + IregIncr(CellByteCnt) + RepeatUntil);
    Branch(AllOnes(CellByteCnt), Upc+1); // Upc = 34

   /*
    * Send the End-of Cell Message
    DCPSIM_MESSAGE(END_OF_CELL_MESSAGE);
    Abus(Literal(END_OF_CELL_MESSAGE));
    ALU(PassA);
    PayloadOut(ALUout);
    Branch(ALWAYS,Upc+1);
    */


LabelDef(AAL2_TX_GIVE_MERGE_TO_RC);

    DCPSIM_MESSAGE(AAL2_TX_GIVE_MERGE_TO_RC);
   /*
    * Release the Merge space by processing the Avail bit
    */
    CregsAddrWrite(TXSTATUS);
    Branch(ALWAYS, Upc+1);                // Upc = 35
    CregInit(AAL2_RX_RC_OWN_FLG);
    Branch(ALWAYS, Upc+1);                // Upc = 36

   /*
    * Jump to the start to continue processing the next ATM Cell Payload
    */

    Branch(ALWAYS, Label(START_PROC));

}