📄 sionew.asm
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label: XPAGEON
USB_EP0_TX_Config: equ 10h ; USB EP0 transmit configuration
USB_EP1_TX_Config: equ 11h ; USB EP1 transmit configuration
USB_Device_Address: equ 12h ; USB device address assigned by host
USB_Status_Control: equ 13h ; USB status and control register
USB_EP0_RX_Status: equ 14h ; USB EP0 receive status
Global_Interrupt: equ 20h ; Global interrupt enable
Watchdog: equ 21h ; clear watchdog Timer
DataToggle: equ 40h ; Data 0/1 bit
get_status: equ 0
clear_feature: equ 1
set_feature: equ 3
set_address: equ 5
get_descriptor: equ 6
get_configuration: equ 8
set_configuration: equ 9
get_interface: equ 10
set_interface: equ 11
device: equ 1
configuration: equ 2
string: equ 3
endpoint_stalled: equ 0 ; recipient endpoint
device_remote_wakeup: equ 1 ; recipient device
HID: equ 21h
report: equ 22h
get_report: equ 1
get_idle: equ 2
get_protocol: equ 3
set_report: equ 9
set_idle: equ 10
set_protocol: equ 11
ENABLE_REMOTE_WAKEUP: equ 2 ; bit[1] = 1
data_valid: equ 10h ;===================================================================
endpoint_0: equ 70h ; control endpoint
bmRequestType: equ 70h
bRequest: equ 71h
wValue: equ 72h ; default wValue (8-bits)
wValueHi: equ 73h
wIndex: equ 74h ; default wIndex (8-bits)
wLength: equ 76h ; default wLength (8-bits)
wLengthHi: equ 77h
interrupt_mask: equ 20h
endp0_data_toggle: equ 22h
loop_counter: equ 23h
data_start: equ 26h
data_count: equ 27h
endpoint_stall: equ 28h
remote_wakeup_status: equ 29h ; remote wakeup request
configuration_status: equ 2Ah ; configuration status
protocol_status: equ 2Ch ; zero is boot protocol
report_buffer: equ 3Ah ; used by GetReport
new_idle_period: equ 3Bh ; used for idle period(ms)
idle_period: equ 3Ch
idle_period_counter: equ 3Dh
new_idle_flag: equ 41h ; used to signal a new idle period
DISABLE_REMOTE_WAKEUP: equ 0 ; bit[1] = 0
BOOT_PROTOCOL: equ 0 ; bit[0] = 0
USBReset: equ 20h ; USB Bus Reset bit
Status_Control: equ FFh ; Processor Status and Control
WatchDogReset: equ 40h ; Watchdog Reset bit
RunBit: equ 1h ; CPU Run bit
ENUMERATE_MASK: equ 0Ch ; one msec timer
GPIO_intMask: equ 40h ; Mask for Port 0 GPIO interrupts.
128us_intMask: equ 02h ; Mask to enable 128us only.
Port0_Data: equ 00h ; GPIO data port 0
Port1_Data: equ 01h ; GPIO data port 1
Port0_Interrupt: equ 04h ; Interrupt enable for port 0
Port1_Interrupt: equ 05h ; Interrupt enable for port 1
Port0_Pullup: equ 08h ; Pullup resistor control for port 0
Port1_Pullup: equ 09h ; Pullup resistor control for port 1
Port0_Isink0: equ 30h
; range 31h-37h, 39h-3fh and 43h-5f are available for this application
; Variable memory allocations
rxEnable: equ 42h ; Receiver Enabled Flag
rxData: equ 43h ; Receive Data Holding Register
rxFrameFlag: equ 44h ; Framing Error Flag (0=No,1=Yes)
rxBuf: equ 45h ; Recieve Buffer Start
txEnable: equ 46h ; Transmiter Enabled Flag
txData: equ 47h ; Transmit Data Holding Register
kcontrol: equ 48h ;
kcode: equ 49h ;
ORG 00h
jmp Reset ; reset vector
jmp DoNothing_ISR
jmp DoNothing_ISR
jmp USB_EP0_ISR ; endpoint 0 interrupt
jmp DoNothing_ISR
jmp Reset ; reserved interrupt
jmp GPIO_ISR ; general purpose I/0 interrupt
jmp DoNothing_ISR
;************** program listing ************************
ORG 10h
DoNothing_ISR:
push A
mov A, [interrupt_mask]
ipret Global_Interrupt
;One_mSec_ISR:
; push A
; mov A, [4ms_counter]
; cmp A, 04h
; jnz inc_4mscount
; mov A, 0
; mov [4ms_counter], A
; mov A, [interrupt_mask] ; return from interrupt
; ipret Global_Interrupt
;inc_4mscount:
; inc [4ms_counter]
; mov A, [interrupt_mask] ; return from interrupt
; ipret Global_Interrupt
;
USB_EP1_ISR:
push A ; save accumulator on stack
iord USB_EP1_TX_Config ; return NAK when data is not
and A, 7Fh ; ready
; xor A, DataToggle
iowr USB_EP1_TX_Config
mov A, [interrupt_mask] ; return from interrupt
ipret Global_Interrupt
Reset:
mov A, endpoint_0 ; move data stack pointer
swap A, dsp ; so it does not write over USB fifos
; initialize variables
;
mov [endpoint_stall], A
mov [remote_wakeup_status], A
mov [configuration_status], A
mov [idle_period], A
iowr Watchdog ; clear watchdog timer
mov A, BOOT_PROTOCOL
mov [protocol_status], A
;
; test what kind of reset occurred
;
iord Status_Control
and A, USBReset ; test for USB Bus Reset
jnz BusReset
iord Status_Control
and A, WatchDogReset ; test for Watch Dog Reset
jz suspendReset
;
; Process a watchdog reset. Wait for a Bus Reset to bring the system
; alive again.
; mov A, TIMER_ONLY ; enable one msec timer interrupt
;
; mov [interrupt_mask],A
;
; iowr Global_Interrupt
WatchdogHandler: ; wait for USB Bus Reset
jmp WatchdogHandler
suspendReset:
mov A, 09h
iowr Status_Control ; go back to suspend
nop
jmp suspendReset ; wait until real bus reset
;
; Either a bus reset or a normal reset has occurred
;
BusReset:
mov A, RunBit ; clear all reset bits
iowr Status_Control
; setup for enumeration
mov A, ENUMERATE_MASK
mov [interrupt_mask],A
iowr Global_Interrupt
wait: ; wait until configured
iowr Watchdog
iord USB_EP1_TX_Config
cmp A, 0
jz wait
call SerialInitialize
;Enable endpoint 1
iord USB_EP1_TX_Config
or A, 10h
iowr USB_EP1_TX_Config
mov A, 0h
main:
mov A, 0
iowr Global_Interrupt
mov A, 80h
mov [txData], A
call txRoutine
;wait for data to come
mov A, 58h ; enable GPIO, EP0, EP1 interrupt
mov [interrupt_mask], A
iowr Global_Interrupt
mov A, 01h
iowr Port1_Interrupt
mov A, 0h
mov [rxEnable], A
mov [rxFrameFlag], A
wait_for_serial:
iowr Watchdog
mov A, [rxEnable]
cmp A, 0h
jz wait_for_serial
mov A, 58h
mov [interrupt_mask], A
iowr Global_Interrupt
mov A, [rxBuf]
call USB_Keyboard_Char
jmp main
USB_Keyboard_Char:
asl A
push A
mov A, 0h
mov [kcontrol], A
mov [kcode], A
pop A
push A
index key_list
cmp A, 02h
jnz Output_char
mov [kcontrol], A
call send_key
Output_char:
pop A
inc A
index key_list
mov [kcode], A
call send_key
mov A, 0h
mov [kcode], A
mov A, [kcontrol]
cmp A, 02h
jnz release_key
call send_key
release_key:
mov A, 0
mov [kcontrol], A
call send_key
ret
send_key:
iord USB_EP1_TX_Config
and A, EFh ; disable endpoint 1
iowr USB_EP1_TX_Config
mov A, [kcontrol]
mov [78h], A
mov A, 00h
mov [79h], A
mov A, [kcode]
mov [7Ah], A
mov A, 00h
mov [7Bh], A
mov A, 00h
mov [7Ch], A
mov A, 00h
mov [7Dh], A
mov A, 00h
mov [7Eh], A
mov A, 00h
mov [7Fh], A
iord USB_EP1_TX_Config
and A, DataToggle ; keep the data 0/1 bit
or A, 98h ; enable transmit 8 bytes
iowr USB_EP1_TX_Config
Nosend:
iowr Watchdog
iord USB_EP1_TX_Config
and A, 80h
cmp A, 80h
jz Nosend ;wait until the charactor is transmitted
iord USB_EP1_TX_Config
xor A, DataToggle
iowr USB_EP1_TX_Config
ret
;
;************************************************************************
; During serial transfers data bit 0 is transmitted first.
; We will use Port 0 Bit 0 for transmit and Port 1 Bit 0 for recieve.
; Data will always be right shifted for either transmit or receive.
; Port 1 Bit 0 will be a falling edge sensitive GPIO_ISR input.
; Port 0 bits 7-0 and Port 1 bits 3-1 will be outputs.
;
SerialInitialize:
push A ; Save the accumulator.
push X ; Save the index.
mov A, FFh ; load accumulator with ones
iowr Port0_Data ; output ones to port 0
iowr Port1_Data ; output ones to port 1
;
mov A, 00h ; load accumulator with zeros
iowr Port0_Pullup ; enable port 0 pullups
iowr Port1_Pullup ; enable port 1 pullups
;
iowr Port0_Interrupt ; disable port 0 interrupts
iowr Port1_Interrupt ; disable port 1 interrupts
;
mov A, 0Fh ; load accumulator with med sink
iowr Port0_Isink0 ; minimum sink current Port1 bit 0
;
; iowr Watchdog ; clear watchdog timer
;
; Clear the serial channel counters.
mov A, 00h
mov [rxEnable], A ; Clear rxEnable Flag
mov [txEnable], A ; Clear txEnable Flag.
mov A, 01h ; Enable port0 bit7 as input.
iowr Port1_Data ; All other bits are outputs.
mov A, FEh ; Select falling edge interrupt
iowr Port1_Pullup ; on port0 bit7.
mov A, 00h ;
iowr Port0_Interrupt ; Disable port 0 bit 7 interrupt.
mov A, 01h
iowr Port1_Interrupt ; Disable Port 1 interrupt.
pop X ; Restore the index.
pop A ; Restore the accumulator.
ret ; Return to caller.
GPIO_ISR:
push A ;5
mov A, 01h ;4
mov [rxEnable], A ;5
mov A, [interrupt_mask] ;5
and A, BFh ;5
iowr Global_Interrupt
call rxRoutine
mov A, [interrupt_mask] ;5
and A, BFh ;5
ipret Global_Interrupt ;13
rxRoutine:
push A ;5
mov A, 0 ;4
mov [rxData], A ;5
mov A, 25h ;4
Start_bit_delay:
dec A ;4
cmp A, 0 ;5
jnz Start_bit_delay ;5
iord Port1_Data ;5
and A, 01h ;4
cmp A, 0 ;5
jnz rxAbort ;5
mov A, 8 ;4
nop
Next_rxBit:
nop
push A ;5
mov A, 55h ;4
rxBit_delay:
dec A ;4
cmp A, 0 ;5
jnz rxBit_delay ;5
mov A, [rxData] ;5
asl A ;4
mov [rxData], A ;5
iord Port1_Data ;5
and A, 01h ;4
or [rxData], A ;7
pop A ;4
dec A ;4
cmp A, 0 ;5
jnz Next_rxBit ;5
mov A, 8h ;4
Save_data:
push A ;5
mov A, [rxData] ;5
rlc A ;4
mov [rxData], A
mov A, [rxBuf] ;5
rrc A ;4
mov [rxBuf], A ;5
pop A ;4
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