aec62xx.c

at91rm9200处理器ide接口驱动程序源代码

	err = ide_config_drive_speed(drive, speed);
	drive->current_speed = speed;
	return(err);
}


static int aec62xx_tune_chipset (ide_drive_t *drive, byte speed)
{
	if (HWIF(drive)->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
		return ((int) aec6210_tune_chipset(drive, speed));
	} else {
		return ((int) aec6260_tune_chipset(drive, speed));
	}
}

#ifdef CONFIG_BLK_DEV_IDEDMA
static int config_aec6210_chipset_for_dma (ide_drive_t *drive, byte ultra)
{
	struct hd_driveid *id	= drive->id;
	ide_hwif_t *hwif	= HWIF(drive);
	byte unit		= (drive->select.b.unit & 0x01);
	unsigned long dma_base	= hwif->dma_base;
	byte speed		= -1;

	if (drive->media != ide_disk)
		return ((int) ide_dma_off_quietly);

	if (((id->dma_ultra & 0x0010) ||
	     (id->dma_ultra & 0x0008) ||
	     (id->dma_ultra & 0x0004)) && (ultra)) {
		speed = XFER_UDMA_2;
	} else if ((id->dma_ultra & 0x0002) && (ultra)) {
		speed = XFER_UDMA_1;
	} else if ((id->dma_ultra & 0x0001) && (ultra)) {
		speed = XFER_UDMA_0;
	} else if (id->dma_mword & 0x0004) {
		speed = XFER_MW_DMA_2;
	} else if (id->dma_mword & 0x0002) {
		speed = XFER_MW_DMA_1;
	} else if (id->dma_mword & 0x0001) {
		speed = XFER_MW_DMA_0;
	} else if (id->dma_1word & 0x0004) {
		speed = XFER_SW_DMA_2;
	} else if (id->dma_1word & 0x0002) {
		speed = XFER_SW_DMA_1;
	} else if (id->dma_1word & 0x0001) {
		speed = XFER_SW_DMA_0;
	} else {
 		return ((int) ide_dma_off_quietly);
 	}

	outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
	(void) aec6210_tune_chipset(drive, speed);

	return ((int)	((id->dma_ultra >> 11) & 3) ? ide_dma_off :
			((id->dma_ultra >> 8) & 7) ? ide_dma_on :
			((id->dma_mword >> 8) & 7) ? ide_dma_on :
			((id->dma_1word >> 8) & 7) ? ide_dma_on :
						     ide_dma_off_quietly);
}

static int config_aec6260_chipset_for_dma (ide_drive_t *drive, byte ultra)
{
	struct hd_driveid *id	= drive->id;
	ide_hwif_t *hwif	= HWIF(drive);
	byte unit		= (drive->select.b.unit & 0x01);
	unsigned long dma_base	= hwif->dma_base;
	byte speed		= -1;
	byte ultra66		= eighty_ninty_three(drive);

	if (drive->media != ide_disk)
		return ((int) ide_dma_off_quietly);

	if ((id->dma_ultra & 0x0010) && (ultra) && (ultra66)) {
		speed = XFER_UDMA_4;
	} else if ((id->dma_ultra & 0x0008) && (ultra) && (ultra66)) {
		speed = XFER_UDMA_3;
	} else if ((id->dma_ultra & 0x0004) && (ultra)) {
		speed = XFER_UDMA_2;
	} else if ((id->dma_ultra & 0x0002) && (ultra)) {
		speed = XFER_UDMA_1;
	} else if ((id->dma_ultra & 0x0001) && (ultra)) {
		speed = XFER_UDMA_0;
	} else if (id->dma_mword & 0x0004) {
		speed = XFER_MW_DMA_2;
	} else if (id->dma_mword & 0x0002) {
		speed = XFER_MW_DMA_1;
	} else if (id->dma_mword & 0x0001) {
		speed = XFER_MW_DMA_0;
	} else if (id->dma_1word & 0x0004) {
		speed = XFER_SW_DMA_2;
	} else if (id->dma_1word & 0x0002) {
		speed = XFER_SW_DMA_1;
	} else if (id->dma_1word & 0x0001) {
		speed = XFER_SW_DMA_0;
	} else {
		return ((int) ide_dma_off_quietly);
	}

	outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
	(void) aec6260_tune_chipset(drive, speed);

	return ((int)	((id->dma_ultra >> 11) & 3) ? ide_dma_on :
			((id->dma_ultra >> 8) & 7) ? ide_dma_on :
			((id->dma_mword >> 8) & 7) ? ide_dma_on :
			((id->dma_1word >> 8) & 7) ? ide_dma_on :
						     ide_dma_off_quietly);
}

static int config_chipset_for_dma (ide_drive_t *drive, byte ultra)
{
	switch(HWIF(drive)->pci_dev->device) {	
		case PCI_DEVICE_ID_ARTOP_ATP850UF:
			return config_aec6210_chipset_for_dma(drive, ultra);
		case PCI_DEVICE_ID_ARTOP_ATP860:
		case PCI_DEVICE_ID_ARTOP_ATP860R:
			return config_aec6260_chipset_for_dma(drive, ultra);
		default:
			return ((int) ide_dma_off_quietly);
	}
}

#endif /* CONFIG_BLK_DEV_IDEDMA */

static void aec62xx_tune_drive (ide_drive_t *drive, byte pio)
{
	byte speed;
	byte new_pio = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);

	switch(pio) {
		case 5:		speed = new_pio; break;
		case 4:		speed = XFER_PIO_4; break;
		case 3:		speed = XFER_PIO_3; break;
		case 2:		speed = XFER_PIO_2; break;
		case 1:		speed = XFER_PIO_1; break;
		default:	speed = XFER_PIO_0; break;
	}

	switch(HWIF(drive)->pci_dev->device) {
		case PCI_DEVICE_ID_ARTOP_ATP850UF:
			(void) aec6210_tune_chipset(drive, speed);
		case PCI_DEVICE_ID_ARTOP_ATP860:
		case PCI_DEVICE_ID_ARTOP_ATP860R:
			(void) aec6260_tune_chipset(drive, speed);
		default:
			break;
        }
}

#ifdef CONFIG_BLK_DEV_IDEDMA
static int config_drive_xfer_rate (ide_drive_t *drive)
{
	struct hd_driveid *id = drive->id;
	ide_dma_action_t dma_func = ide_dma_on;

	if (id && (id->capability & 1) && HWIF(drive)->autodma) {
		/* Consult the list of known "bad" drives */
		if (ide_dmaproc(ide_dma_bad_drive, drive)) {
			dma_func = ide_dma_off;
			goto fast_ata_pio;
		}
		dma_func = ide_dma_off_quietly;
		if (id->field_valid & 4) {
			if (id->dma_ultra & 0x001F) {
				/* Force if Capable UltraDMA */
				dma_func = config_chipset_for_dma(drive, 1);
				if ((id->field_valid & 2) &&
				    (dma_func != ide_dma_on))
					goto try_dma_modes;
			}
		} else if (id->field_valid & 2) {
try_dma_modes:
			if ((id->dma_mword & 0x0007) ||
			    (id->dma_1word & 0x0007)) {
				/* Force if Capable regular DMA modes */
				dma_func = config_chipset_for_dma(drive, 0);
				if (dma_func != ide_dma_on)
					goto no_dma_set;
			}
		} else if (ide_dmaproc(ide_dma_good_drive, drive)) {
			if (id->eide_dma_time > 150) {
				goto no_dma_set;
			}
			/* Consult the list of known "good" drives */
			dma_func = config_chipset_for_dma(drive, 0);
			if (dma_func != ide_dma_on)
				goto no_dma_set;
		} else {
			goto fast_ata_pio;
		}
	} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
		dma_func = ide_dma_off_quietly;
no_dma_set:
		aec62xx_tune_drive(drive, 5);
	}
	return HWIF(drive)->dmaproc(dma_func, drive);
}

/*
 * aec62xx_dmaproc() initiates/aborts (U)DMA read/write operations on a drive.
 */
int aec62xx_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
{
	switch (func) {
		case ide_dma_check:
			return config_drive_xfer_rate(drive);
		case ide_dma_lostirq:
		case ide_dma_timeout:
			switch(HWIF(drive)->pci_dev->device) {
				case PCI_DEVICE_ID_ARTOP_ATP860:
				case PCI_DEVICE_ID_ARTOP_ATP860R:
//					{
//						int i = 0;
//						byte reg49h = 0;
//						pci_read_config_byte(HWIF(drive)->pci_dev, 0x49, &reg49h);
//						for (i=0;i<256;i++)
//							pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h|0x10);
//						pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h & ~0x10);
//					}
//					return 0;
				default:
					break;
			}
		default:
			break;
	}
	return ide_dmaproc(func, drive);	/* use standard DMA stuff */
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
#endif /* CONFIG_AEC62XX_TUNING */

unsigned int __init pci_init_aec62xx (struct pci_dev *dev, const char *name)
{
	if (dev->resource[PCI_ROM_RESOURCE].start) {
		pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
		printk("%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
	}

#if defined(DISPLAY_AEC62XX_TIMINGS) && defined(CONFIG_PROC_FS)
	if (!aec62xx_proc) {
		aec62xx_proc = 1;
		bmide_dev = dev;
		aec62xx_display_info = &aec62xx_get_info;
	}
#endif /* DISPLAY_AEC62XX_TIMINGS && CONFIG_PROC_FS */

	return dev->irq;
}

unsigned int __init ata66_aec62xx (ide_hwif_t *hwif)
{
	byte mask	= hwif->channel ? 0x02 : 0x01;
	byte ata66	= 0;

	pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
	return ((ata66 & mask) ? 0 : 1);
}

void __init ide_init_aec62xx (ide_hwif_t *hwif)
{
#ifdef CONFIG_AEC62XX_TUNING
	hwif->tuneproc = &aec62xx_tune_drive;
	hwif->speedproc = &aec62xx_tune_chipset;
#ifdef CONFIG_BLK_DEV_IDEDMA
	if (hwif->dma_base)
		hwif->dmaproc = &aec62xx_dmaproc;
#else /* !CONFIG_BLK_DEV_IDEDMA */
	hwif->drives[0].autotune = 1;
	hwif->drives[1].autotune = 1;
#endif /* CONFIG_BLK_DEV_IDEDMA */
#endif /* CONFIG_AEC62XX_TUNING */
}

void __init ide_dmacapable_aec62xx (ide_hwif_t *hwif, unsigned long dmabase)
{
#ifdef CONFIG_AEC62XX_TUNING
	unsigned long flags;
	byte reg54h = 0;

	__save_flags(flags);	/* local CPU only */
	__cli();		/* local CPU only */

	pci_read_config_byte(hwif->pci_dev, 0x54, &reg54h);
	pci_write_config_byte(hwif->pci_dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F));

	__restore_flags(flags);	/* local CPU only */
#endif /* CONFIG_AEC62XX_TUNING */
	ide_setup_dma(hwif, dmabase, 8);
}