cpu_init.c

日本著名的的嵌入式实时操作系统T-Kernel的源码及用户手册。

/*
 *----------------------------------------------------------------------
 *    T-Kernel
 *
 *    Copyright (C) 2004 by Ken Sakamura. All rights reserved.
 *    T-Kernel is distributed under the T-License.
 *----------------------------------------------------------------------
 *
 *    Version:   1.01.00
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2004/6/28.
 *
 *----------------------------------------------------------------------
 */

/*
 *	cpu_init.c (MC9328)
 *	CPU-Dependent Initialization/Finalization
 */

#include "kernel.h"
#include "task.h"
#include "cpu_insn.h"

EXPORT MONHDR	SaveMonHdr;	/* For saving monitor exception handler */
EXPORT ATR	available_cop;	/* Available coprocessor */
EXPORT UW	*SystemUATB;	/* System page table UATB */
EXPORT UW	*cur_uatb;	/* Current task space */

/*
 * CPU-dependant initialization
 */
EXPORT ER cpu_initialize( void )
{
IMPORT void FlushCache( VP laddr, INT len );	/* Cache flush */
IMPORT void dispatch_entry( void );		/* Dispatcher call */
IMPORT void call_entry( void );			/* System call */
IMPORT void _tk_ret_int( void );		/* 'tk_ret_int()' only call */
IMPORT void call_dbgspt( void );		/* Debugger support call */

	UW	ptbl;
	UW	*p, *ep;

	/* Save monitor exception handler */
	SaveMonHdr.default_hdr = SCArea->intvec[VECNO_DEFAULT];
	SaveMonHdr.break_hdr   = SCArea->intvec[VECNO_BREAK];
	SaveMonHdr.monitor_hdr = SCArea->intvec[VECNO_MONITOR];
	SaveMonHdr.gpioa_hdr   = SCArea->intvec[VECNO_GPIOA];
	SaveMonHdr.gpiob_hdr   = SCArea->intvec[VECNO_GPIOB];
	SaveMonHdr.gpioc_hdr   = SCArea->intvec[VECNO_GPIOC];
	SaveMonHdr.gpiod_hdr   = SCArea->intvec[VECNO_GPIOD];
	SaveMonHdr.fpga_hdr    = SCArea->intvec[VECNO_FPGA];
	SaveMonHdr.powersw_hdr = SCArea->intvec[VECNO_POWERSW];
	SaveMonHdr.abortsw_hdr = SCArea->intvec[VECNO_ABORTSW];

	/* Get page table address */
	Asm("mrc p15, 0, %0, cr2, c0": "=r"(ptbl));
	ptbl &= 0xffffc000;
	SystemUATB = (UW*)ptbl + TOP_PDIR_ENTRIES;

	/* Disable task space */
	cur_uatb = NULL;
	FlushCache(NULL, 0);	/* Cache flush */
	p  = SystemUATB;
	ep = SystemUATB + NUM_PDIR_ENTRIES;
	while ( p < ep ) *p++ = 0;
	PurgeTLB();	/* TLB disable */

	/* No available coprocessor */
	available_cop = TA_NULL;

	/* Register exception handler used on OS */
	define_inthdr(SWI_SVC,      call_entry);
	define_inthdr(SWI_RETINT,   _tk_ret_int);
	define_inthdr(SWI_DISPATCH, dispatch_entry);
#if USE_DBGSPT
	define_inthdr(SWI_DEBUG,    call_dbgspt);
#endif

	return E_OK;
}

/*
 * CPU-dependant finalization
 */
EXPORT void cpu_shutdown( void )
{
	/* Restore saved monitor exception handler */
	SCArea->intvec[VECNO_DEFAULT] = SaveMonHdr.default_hdr;
	SCArea->intvec[VECNO_BREAK]   = SaveMonHdr.break_hdr;
	SCArea->intvec[VECNO_MONITOR] = SaveMonHdr.monitor_hdr;
	SCArea->intvec[VECNO_GPIOA]   = SaveMonHdr.gpioa_hdr;
	SCArea->intvec[VECNO_GPIOB]   = SaveMonHdr.gpiob_hdr;
	SCArea->intvec[VECNO_GPIOC]   = SaveMonHdr.gpioc_hdr;
	SCArea->intvec[VECNO_GPIOD]   = SaveMonHdr.gpiod_hdr;
	SCArea->intvec[VECNO_FPGA]    = SaveMonHdr.fpga_hdr;
	SCArea->intvec[VECNO_POWERSW] = SaveMonHdr.powersw_hdr;
	SCArea->intvec[VECNO_ABORTSW] = SaveMonHdr.abortsw_hdr;
}

/* ------------------------------------------------------------------------- */

/*
 * Task exception handler startup reservation
 */
EXPORT void request_tex( TCB *tcb )
{
	/* Cannot set to the task operating at protected level 0 */
	if ( tcb->isysmode == 0 ) {
		tcb->reqdct = 1;
	}
}

/*
 * Task exception handler startup setting
 *
 *	First stack state
 *		System stack		User stack
 *		+---------------+		+---------------+
 *	ssp ->	| SPSR_svc	|	usp ->	| (xxxxxxxxxxx)	|
 *		| R12     = ip	|		|		|
 *		| R14_svc = lr	|
 *		+---------------+
 *
 *	Stack state after change (Change *)
 *		+---------------+		+---------------+
 *	ssp ->	| SPSR_svc	|*	usp* ->	| CPSR		|*
 *		| R12		|		| texcd		|*
 *		| texhdr	|*		| retadr	|*
 *		+---------------+		+---------------+
 *						| (xxxxxxxxxxx)	|
 */
EXPORT void setup_texhdr( UW *ssp )
{
	FP	texhdr;
	INT	texcd;
	UINT	m;
	UW	*usp;

	/* Called in interrupt disable state */

	ctxtsk->reqdct = 0;	/* Clear DCT */

	/* Get exception code */
	m = 0x00000001;
	for ( texcd = 0; texcd <= 31; texcd++ ) {
		if ( (ctxtsk->exectex & m) != 0 ) break;
		m <<= 1;
	}
	/* Exception does not occur /Exception is cleared */
	if ( texcd > 31 ) return;

	ctxtsk->exectex = 0;
	ctxtsk->pendtex &= ~m;
	ctxtsk->texflg |= ( texcd == 0 )? TEX0_RUNNING: TEX1_RUNNING;
	texhdr = ctxtsk->texhdr;

	/* Get user stack pointer */
	Asm("stmia %0, {sp}^ ; nop":: "r"(&usp));

	/* If the exception code is 0, return the user stack
	   to the initial value */
	if ( texcd == 0 ) usp = ctxtsk->istack;

	usp -= 3;

	/* Set user stack pointer */
	Asm("ldmia %0, {sp}^ ; nop":: "r"(&usp));

	ENABLE_INTERRUPT;

	/* Stack adjustment
	 *	A page fault may occur 
	 *	due to access to the user stack.
	 */
	*(usp + 0) = *(ssp + 0);	/* CPSR */
	*(usp + 1) = texcd;
	*(usp + 2) = *(ssp + 2);	/* retadr */
	*(ssp + 2) = (UW)texhdr & ~1;
	if ( ((UW)texhdr & 1) == 0 ) {
		*ssp &= ~PSR_T;
	} else {
		*ssp |= PSR_T;
	}
}