icrt0.s

日本著名的的嵌入式实时操作系统T-Kernel的源码及用户手册。

/*
 *----------------------------------------------------------------------
 *    T-Kernel
 *
 *    Copyright (C) 2004 by Ken Sakamura. All rights reserved.
 *    T-Kernel is distributed under the T-License.
 *----------------------------------------------------------------------
 *
 *    Version:   1.01.00
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2004/6/28.
 *
 *----------------------------------------------------------------------
 */

/*
 *	icrt0.S (VR4131)
 *	System Startup
 */

#include <machine.h>
#include <tk/asm.h>

#if _Csym == 0
#define	START	_start
#else
#define	START	start
#endif

/* System common information */
#define	RAM_TOP		(SCINFO + 0)	// Head of ext. RAM free area
#define	RAM_END		(SCINFO + 4)	// End of ext. RAM free area

/* CP0 status register initial setting value (except for DS area) */
#define	INIT_PSR	SR_XX|SR_KX|SR_SX|SR_UX

/* CP0 config register */
#define	CFG_K0_MASK	0x00000007	/* K0 part mask */
#define	CFG_K0_CACHEON	0x00000003	/* Writeback cache on */

	/* Low level memory manager information */
	.comm	Csym(lowmem_top), 4	// Head of area (Low address)
	.comm	Csym(lowmem_limit), 4	// End of area (High address)

	.lcomm	monitor_stacktop, 4	// Monitor stack pointer for re-startup

/*
 * System startup
 */
	.text
	.balign	4
	.globl	START
	.type	START, %function
START:
	/* Use the stack set by the monitor */

	mfc0	$t0, $CP0_PSR		// Initial value setting for status register
	and	$t0, $t0, SR_DS
	or	$t0, $t0, INIT_PSR
	mtc0	$t0, $CP0_PSR		// IE = 0 Interrupt disable

	mfc0	$t0, $CP0_CFG		// Cache on
	and	$t0, $t0, ~CFG_K0_MASK
	or	$t0, $t0, CFG_K0_CACHEON
	mtc0	$t0, $CP0_CFG
	NOP(HzD_MTC0 - HzS_FETCH)
	nop;nop;nop			// Just in case, add 'nop'

	la	$gp, _gp

	la	$t1, __data_org		// Initialization of 'data' area (ROM startup)
	la	$t2, __data_start
	subu	$s0, $t1, $t2		// If s0 != 0, start Rom
	la	$t3, _edata
	beqz	$s0, nocopy_data
	bgeu	$t2, $t3, nocopy_data
  copy_data:
	lw	$t0, ($t1)
	addu	$t1, $t1, 4
	sw	$t0, ($t2)
	addu	$t2, $t2, 4
	bltu	$t2, $t3, copy_data
  nocopy_data:

	la	$t1, __bss_start	// Clear 'bss' area
	la	$t2, _end
	bgeu	$t1, $t2, nobss
  clrbss:
	sw	$zero, ($t1)
	addu	$t1, $t1, 4
	bltu	$t1, $t2, clrbss
  nobss:

	sw	$sp, monitor_stacktop	// Monitor stack pointer for re-startup
					// Save

	lui	$t7, shigh(SCINFO)
	lw	$t1, slow(RAM_TOP)($t7)	// Low level memory manager initial setting
	bltu	$t2, $t1, l1		// _end or RAM_TOP
	move	$t1, $t2		// Either of High addresses
  l1:
	sw	$t1, lowmem_top		// lowmem_top = _end or RAM_TOP
	lw	$t0, slow(RAM_END)($t7)
	sw	$t0, lowmem_limit	// lowmem_limit = RAM_END

	subu	$sp, $sp, 4*8		// Function parameter area
	beqz	$s0, l2
	jal	Csym(ROM_startup)	// Initialization at ROM startup
  l2:

	jal	Csym(main)		// System startup

  l_end:				// Not suppose to return from 'main,'
	j	l_end			// but, just in case, prepare for out of control.