📄 sysinfo_depend.h
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/* *---------------------------------------------------------------------- * T-Kernel * * Copyright (C) 2004 by Ken Sakamura. All rights reserved. * T-Kernel is distributed under the T-License. *---------------------------------------------------------------------- * * Version: 1.01.00 * Released by T-Engine Forum(http://www.t-engine.org) at 2004/6/28. * *---------------------------------------------------------------------- *//* * @(#)sysinfo_depend.h (sys/S1C38K) * * System common information * * 0x10004000 +-----------------------+ * |Exception vector table | * 0x100041c0 +-----------------------+ * |System common info. | * 0x10004200 +-----------------------+ * * Details of exception vector table * 0x10004000 +-----------------------+ Vector number * |Default handler | 0 * |Undefined instruction | 1 * |Pre-fetch abort | 2 * |Data abort | 3 * 0x10004010 +-----------------------+ * |Software SWI 4 | 4 * |Interrupt : | | * | SWI 29 | 29 * 0x10004078 +-----------------------+ * |High-speed FIQ0 | 30 * |Interrupt FIQ1 | 31 * 0x10004080 +-----------------------+ * |Interrupt IRQ0 | 32 * | : | | * | IRQ31 | 63 * 0x10004100 +-----------------------+ * |GPIO interrupt pin 0 | 64 * |Port A : | | * | pin 7 | 71 * 0x10004120 +-----------------------+ * |GPIO interrupt pin 0 | 72 * |Port B : | | * | pin 7 | 79 * 0x10004140 +-----------------------+ * |FPGA interrupt bit 0 | 80 * |SYS_STR1 : | | * | bit 7 | 87 * 0x10004160 +-----------------------+ * |FPGA interrupt bit 0 | 88 * |SYS_STR2 : | | * | bit 7 | 95 * 0x10004180 +-----------------------+ * |Extended board | 96 * 0x10004184 +-----------------------+ * | | 97 * |(Reserved) | | * | | 111 * 0x100041c0 +-----------------------+ */#ifndef __SYS_SYSINFO_DEPEND_H__#define __SYS_SYSINFO_DEPEND_H__#ifdef __cplusplusextern "C" {#endif#ifndef _in_asm_source_/* * Boot mode/Operation mode */typedef union { struct { UW debug:1; /* When in debug mode 1 */ UW fsrcv:1; /* When in disk repair mode 1 */ UW rsv:12; /* Reserved (always 0) */ UW basic:1; /* When in basic operation mode 1 */ UW rsv2:17; /* Reserved (always 0) */ } c; UW w;} BootMode;#define BM_DEBUG 0x00000001 /* Debug mode */#define BM_FSRCV 0x00000002 /* Disk repair mode */#define BM_BASIC 0x00004000 /* Basic operation mode *//* * System shared information */typedef struct { VP ramtop; /* RAM free space top */ VP ramend; /* RAM free space end */ UB *sysconf; /* SYSCONF top */ UB *devconf; /* DEVCONF top */ W taskindp; /* Task independent context flag */ UW taskmode; /* Task mode flag */ UW loop64us; /* Loop count per 64 micro sec */ BootMode bm; /* Boot mode */ UB bootdev[8]; /* Boot device name */ VW rsv[6]; /* Reserved (always 0) */} SysCommonInfo;/* * System common area */#define N_INTVEC 112typedef struct { FP intvec[N_INTVEC]; /* EIT vector */ SysCommonInfo scinfo; /* System common information */} SysCommonArea;#define SCArea ( (SysCommonArea*)0x10004000 )#define SCInfo ( SCArea->scinfo )#endif /* _in_asm_source_ *//* Definitions used by assembler */#define TASKINDP (0x100041c0 + 4*4) /* Task independent flag */#define TASKMODE (0x100041c0 + 5*4) /* Task mode flag *//* * Vector table address */#define EIT_VECTBL 0x10004000 /* Vector table top */#define EITVEC(n) ( EIT_VECTBL + (n) * 4 )#define EIT_DEFAULT 0 /* Default handler */#define EIT_UNDEF 1 /* Undefined instruction */#define EIT_IABORT 2 /* Pre-fetch abort */#define EIT_DABORT 3 /* Data abort */#define EIT_FIQ(n) ( 30 + (n) ) /* High-speed interrupt (FIQ 0-1) */#define EIT_IRQ(n) ( 32 + (n) ) /* Interrupt (IRQ 0-31) */#define EIT_GPA(n) ( 64 + (n) ) /* GPIO Port A interrupt (pin 0-7) */#define EIT_GPB(n) ( 72 + (n) ) /* GPIO Port B interrupt (pin 0-7) */#define EIT_FPGA1(n) ( 80 + (n) ) /* FPGA IRQ_STR1 interrupt (bit 0-7) */#define EIT_FPGA2(n) ( 88 + (n) ) /* FPGA IRQ_STR2 interrupt (bit 0-7) */#define EIT_EXBOARD 96 /* Extension board */#ifdef __cplusplus}#endif#endif /* __SYS_SYSINFO_DEPEND_H__ */
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