pci.h

日本著名的的嵌入式实时操作系统T-Kernel的源码及用户手册。

/*
 *----------------------------------------------------------------------
 *    T-Kernel
 *
 *    Copyright (C) 2004 by Ken Sakamura. All rights reserved.
 *    T-Kernel is distributed under the T-License.
 *----------------------------------------------------------------------
 *
 *    Version:   1.01.00
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2004/6/28.
 *
 *----------------------------------------------------------------------
 */

/*
 *	@(#)pci.h (libtk/VR4131)
 *
 *	PCI device access function 
 */

#ifndef __PCI_H__
#define __PCI_H__

#include <basic.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *	PCI configuration address (caddr) format:
 *
 *	00..00 bbbb bbbb dddd dfff	(b: bus, d: device, f: function)
 */

/*
 *	PCI configuration space header (type 0) register definition 
 */
#define	PCR_VENDORID		0x00	/* H */
#define PCR_DEVID		0x02	/* H */
#define PCR_COMMAND		0x04	/* H */
#define PCR_STATUS		0x06	/* H */
#define PCR_REVID		0x08	/* B */
#define PCR_P_CLASS		0x09	/* B */
#define PCR_S_CLASS		0x0A	/* B */
#define PCR_B_CLASS		0x0B	/* B */
#define PCR_CASHLINE		0x0C	/* B */
#define PCR_LATENCY		0x0D	/* B */
#define PCR_HEADERTYPE		0x0E	/* B */
#define PCR_BIST		0x0F	/* B */
#define PCR_BASEADDR_0		0x10	/* W */
#define PCR_BASEADDR_1		0x14	/* W */
#define PCR_BASEADDR_2		0x18	/* W */
#define PCR_BASEADDR_3		0x1C	/* W */
#define PCR_BASEADDR_4		0x20	/* W */
#define PCR_BASEADDR_5		0x24	/* W */
#define PCR_RSV1		0x28
#define PCR_SUBVENDID		0x2C	/* H */
#define PCR_SUBDEVID		0x2E	/* H */
#define PCR_ROMBASE		0x30	/* W */
#define PCR_RSV2		0x34
#define PCR_RSV3		0x38
#define PCR_IRQLIN		0x3C	/* B */
#define PCR_IRQPIN		0x3D	/* B */
#define PCR_MINGRANT		0x3E	/* B */
#define PCR_MAXLATENCY		0x3F	/* B */

/*
 *	PCI configuration space register input  
 */
IMPORT	UB	inPciConfB(W caddr, W reg);
IMPORT	UH	inPciConfH(W caddr, W reg);
IMPORT	UW	inPciConfW(W caddr, W reg);

/*
 *	PCI configuration space register output 
 */
IMPORT	void	outPciConfB(W caddr, W reg, UW dat);
IMPORT	void	outPciConfH(W caddr, W reg, UW dat);
IMPORT	void	outPciConfW(W caddr, W reg, UW dat);

/*
 *	Get base address and size for PCI configuration space  
 *
 *	Function value	PTTI	I = 1: I/O address, 0: memory address
 *			T = 0: 32 bit space, 1: 20 bit, 2: 64 bit
 *			P = 1: prefetch enabled
 */
IMPORT	W	getPciBaseAddr(W caddr, W reg, VP *addr, W *size);

#define	isBaseAddrIO(t)		((t) == 0x01)
#define	isBaseAddr32(t)		(((t) & 0x07) == 0x00)
#define	isBaseAddr20(t)		(((t) & 0x07) == 0x02)
#define	isBaseAddr64(t)		(((t) & 0x07) == 0x04)
#define	isBaseAddrPreFetch(t)	(((t) & 0x08) == 0x08)

/*
 *	PCI device search 
 *
 *	vendor	<  0x10000 : vendor, devid devices 
 *		== 0x1FFFF : devid number device
 *		== 0x1#### : devid number class == #### device
 *	Function value	>= 0 : PCI configuration address (caddr)
 *		<  0 : not found
 */
IMPORT	INT	searchPciDev(W vendor, W devid);

#define	SEARCH_CLASS(class)	((class) | 0x10000)
#define	SEARCH_ALL		(0x1FFFF)

#ifdef __cplusplus
}
#endif
#endif /* __PCI_H__ */