spmc70_regs.inc

基于SPMC75的NNAD_Flash K9F1208的驱动程式序,对一些需要存海量数据的单片机应用场合有用.

.DEFINE CW_PORTPAD5_SET_HI			(0x0001 << 5)
.DEFINE CW_PORTPAD6_SET_HI			(0x0001 << 6)
.DEFINE CW_PORTPAD7_SET_HI			(0x0001 << 7)
.DEFINE CW_PORTPAD8_SET_HI			(0x0001 << 8)
.DEFINE CW_PORTPAD9_SET_HI			(0x0001 << 9)
.DEFINE CW_PORTPAD10_SET_HI			(0x0001 << 10)
.DEFINE CW_PORTPAD11_SET_HI			(0x0001 << 11)
.DEFINE CW_PORTPAD12_SET_HI			(0x0001 << 12)
.DEFINE CW_PORTPAD13_SET_HI			(0x0001 << 13)
.DEFINE CW_PORTPAD14_SET_HI			(0x0001 << 14)
.DEFINE CW_PORTPAD15_SET_HI			(0x0001 << 15)


//=================================//
// E. LVD and LVR register		   //	
//=================================//
// P_LVDLVR_Ctrl register//
// word set //
.DEFINE CW_LVDLS_2_6V					0x0000
.DEFINE CW_LVDLS_2_8V					0x0001
.DEFINE CW_LVDLS_3_0V					0x0002
.DEFINE CW_LVDLS_3_2V					0x0003
.DEFINE CW_LVD_INT_EN					(0x0001 << 2)
.DEFINE CW_LVD_SOFT_CTRL_DISABLE		(0x0001 << 3)
.DEFINE CW_LVD_REFVOL_EN				(0x0001 << 4)
.DEFINE CW_LVDPWR_SOFT_CTRL_DISABLE 	(0x0001 << 5)


// P_LVD_Status register//
// word set //
.DEFINE	CW_LVDIF						0x0001			//LVD Interrupt Flag


//=================================//
// F. Power saving mode and wakup  //
//=================================//

// P_Wakeup_Status register//
// word set //
.DEFINE	CW_CLEAR_WAKEUP				0x55AA			//Clear Wakeup Status command
.DEFINE CW_WAKEUPSF					0x0001			//Wakeup Status Flag
.DEFINE CW_STDBYSF					(0x0001 << 1)	//Standby Status Flag
.DEFINE CW_SLEEPSF					(0x0001 << 2)	//Sleep Status Flag
.DEFINE CW_HALTSF					(0x0001 << 3)	//Halt Status Flag


// P_Wakeup_Source register//
// word set //
.DEFINE CW_2HZ_WAKEUP_EN			0x0001
.DEFINE CW_4HZ_WAKEUP_EN			(0x0001 << 1)
.DEFINE CW_TMB1_WAKEUP_EN			(0x0001 << 2)
.DEFINE CW_TMB2_WAKEUP_EN			(0x0001 << 3)
.DEFINE CW_LVD_WAKEUP_EN			(0x0001 << 4)
.DEFINE CW_TMR0_WAKEUP_EN			(0x0001 << 5)
.DEFINE CW_TMR1_WAKEUP_EN			(0x0001 << 6)
.DEFINE CW_TMR2_WAKEUP_EN			(0x0001 << 7)
.DEFINE CW_PCIINT_WAKEUP_EN			(0x0001 << 8)
.DEFINE CW_SIOINT_WAKEUP_EN			(0x0001 << 9)
.DEFINE CW_SPIINT_WAKEUP_EN			(0x0001 << 10)
.DEFINE CW_UARTINT_WAKEUP_EN		(0x0001 << 11)
.DEFINE CW_KCD_WAKEUP_EN			(0x0001 << 12)
.DEFINE CW_KCC_WAKEUP_EN			(0x0001 << 13)
.DEFINE CW_KCB_WAKEUP_EN			(0x0001 << 14)
.DEFINE CW_KCA_WAKEUP_EN			(0x0001 << 15)


// P_Halt_Enter register //
// word set //
.DEFINE CW_HALT_MODE				0x5555			//Halt Mode Command


// P_Stdby_Enter register //
// word set //
.DEFINE CW_STDBY_MODE				0x5A5A			//Standy Mode Command


// P_Sleep_Enter register//
// word set //
.DEFINE	CW_SleepCMD					0x55AA			//Sleep Mode Command


//=================================//
// G. PCI register				   //
//=================================//
// P_PCI_Ctrl register //
// word set //
.DEFINE CW_RST_OUTPUT_EN			(0x0001 << 3)
.DEFINE CW_PCI_INT_EN				(0x0001 << 4)
.DEFINE CW_PCI_MASTER_MODE			(0x0001 << 5)
.DEFINE CW_PCI_12PIN_MODE			(0x0001 << 6)
.DEFINE CW_PCI_EN					(0x0001 << 7)


// P_PCI_Status register //
// word set //
.DEFINE CW_IS_PWR_SLEEP_MODE		(0x0001 << 2)
.DEFINE CW_RCVD_SLAVE_STATUS		(0x0001 << 3)
.DEFINE CW_RCVD_MASTER_COMMAND		(0x0001 << 3)			
.DEFINE CW_PCI_CLEARINTF			(0x0001 << 4)
.DEFINE CW_PCI_RCVD_OVR_ERR			(0x0001 << 5)
.DEFINE CW_IS_PCI_TXBUF_FULL		(0x0001 << 6)							
.DEFINE CW_IS_PCI_RXBUF_FULL		(0x0001 << 7)


// P_PCI_COMM register //
// word set //
.DEFINE CW_PCIReset					0x0055			//Marster send Reset Command
.DEFINE CW_PCIWakeup				0x00AA			//Marster send Wakeup Command  
.DEFINE CW_PCICMD					0x5555			//PCI COMMAND


// P_PCI_TxBuf register //
// word set //
.DEFINE	CW_PCITxCMD					0x5555			//PCI Tx COMMAND


// P_PCI_RxBuf register //
// word set //
.DEFINE	CW_PCIRxCMD					0x5555			//PCI Rx COMMAND


//=================================//
// H. Timer0/Timer1/Timer2 register//
//=================================//
// P_Timer0_Ctrl register //
// word set //
.DEFINE CW_TMR0_CLKAFS_CPUCLKdiv2		0x0000
.DEFINE CW_TMR0_CLKAFS_CPUCLKdiv256		0x0001
.DEFINE CW_TMR0_CLKAFS_32768HZ			0x0002
.DEFINE CW_TMR0_CLKAFS_8192HZ			0x0003
.DEFINE CW_TMR0_CLKAFS_4096HZ			0x0004
.DEFINE CW_TMR0_CLKAFS_1				0x0005
.DEFINE CW_TMR0_CLKAFS_0				0x0006
.DEFINE CW_TMR0_CLKAFS_EXT1				0x0007

.DEFINE CW_TMR0_CLKBFS_2048HZ			0x0000
.DEFINE CW_TMR0_CLKBFS_1024HZ			(0x0001 << 3)
.DEFINE CW_TMR0_CLKBFS_256HZ			(0x0002 << 3)
.DEFINE CW_TMR0_CLKBFS_TMB1				(0x0003 << 3)
.DEFINE CW_TMR0_CLKBFS_4HZ				(0x0004 << 3)
.DEFINE CW_TMR0_CLKBFS_2HZ				(0x0005 << 3)
.DEFINE CW_TMR0_CLKBFS_1				(0x0006 << 3)
.DEFINE CW_TMR0_CLKBFS_EXT2				(0x0007 << 3)

.DEFINE CW_TMR0_SYNCH					(0x0001 << 6)

.DEFINE CW_TMR0_CAP_MODE_RISE			(0x0004 << 7)
.DEFINE CW_TMR0_CAP_MODE_FALL			(0x0005 << 7)
.DEFINE CW_TMR0_CAP_MODE_4RISE			(0x0006 << 7)
.DEFINE CW_TMR0_CAP_MODE_16RISE			(0x0007 << 7)
.DEFINE CW_TMR0_CMP_MODE_SETOUT			(0x0008 << 7)
.DEFINE CW_TMR0_CMP_MODE_CLROUT			(0x0009 << 7)
.DEFINE CW_TMR0_CMP_MODE_UNAFFECTED 	(0x000a << 7)
.DEFINE CW_TMR0_PWM_MODE_NRO			(0x000c << 7)
.DEFINE CW_TMR0_PWM_MODE_NRZ			(0x000d << 7)
.DEFINE CW_TMR0_PWM_MODE_RT0			(0x000e << 7)
.DEFINE CW_TMR0_PWM_MODE_RTZ			(0x000f << 7)

.DEFINE CW_TMR0_EXT2PS_RISE				(0x0001 << 11)
.DEFINE CW_TMR0_EXT2PS_4RISE			(0x0002 << 11)
.DEFINE CW_TMR0_EXT2PS_16RISE			(0x0003 << 11)

.DEFINE CW_TMR0_INT_EN					(0x0001 << 13)
.DEFINE CW_TMR0_INTF_CLEAR				(0x0001 << 14)
.DEFINE CW_TMR0_EN						(0x0001 << 15)	


// P_Timer1_Ctrl register //
// word set //
.DEFINE CW_TMR1_CLKAFS_CPUCLKdiv2		0x0000
.DEFINE CW_TMR1_CLKAFS_CPUCLKdiv256		0x0001
.DEFINE CW_TMR1_CLKAFS_32768HZ			0x0002
.DEFINE CW_TMR1_CLKAFS_8192HZ			0x0003
.DEFINE CW_TMR1_CLKAFS_4096HZ			0x0004
.DEFINE CW_TMR1_CLKAFS_1				0x0005
.DEFINE CW_TMR1_CLKAFS_0				0x0006
.DEFINE CW_TMR1_CLKAFS_EXT1				0x0007

.DEFINE CW_TMR1_SYNCH					(0x0001 << 6)

.DEFINE CW_TMR1_CAP_MODE_RISE			(0x0004 << 7)
.DEFINE CW_TMR1_CAP_MODE_FALL			(0x0005 << 7)
.DEFINE CW_TMR1_CAP_MODE_4RISE			(0x0006 << 7)
.DEFINE CW_TMR1_CAP_MODE_16RISE			(0x0007 << 7)
.DEFINE CW_TMR1_CMP_MODE_SETOUT			(0x0008 << 7)
.DEFINE CW_TMR1_CMP_MODE_CLROUT			(0x0009 << 7)
.DEFINE CW_TMR1_CMP_MODE_UNAFFECTED		(0x000a << 7)
.DEFINE CW_TMR1_PWM_MODE_NRO			(0x000c << 7)
.DEFINE CW_TMR1_PWM_MODE_NRZ			(0x000d << 7)
.DEFINE CW_TMR1_PWM_MODE_RT0			(0x000e << 7)
.DEFINE CW_TMR1_PWM_MODE_RTZ			(0x000f << 7)

.DEFINE CW_TMR1_EXT1PS_RISE				(0x0001 << 11)
.DEFINE CW_TMR1_EXT1PS_4RISE			(0x0002 << 11)
.DEFINE CW_TMR1_EXT1PS_16RISE			(0x0003 << 11)

.DEFINE CW_TMR1_INT_EN					(0x0001 << 13)
.DEFINE CW_TMR1_INTF_CLEAR				(0x0001 << 14)
.DEFINE CW_TMR1_EN						(0x0001 << 15)	


// P_Timer2_Ctrl register //
// word set //
.DEFINE CW_TMR2_CLKAFS_CPUCLKdiv2		0x0000
.DEFINE CW_TMR2_CLKAFS_CPUCLKdiv256		0x0001
.DEFINE CW_TMR2_CLKAFS_32768HZ			0x0002
.DEFINE CW_TMR2_CLKAFS_8192HZ			0x0003
.DEFINE CW_TMR2_CLKAFS_4096HZ			0x0004
.DEFINE CW_TMR2_CLKAFS_1				0x0005
.DEFINE CW_TMR2_CLKAFS_0				0x0006
.DEFINE CW_TMR2_CLKAFS_EXT1				0x0007

.DEFINE CW_TMR2_SYNCH					(0x0001 << 6)

.DEFINE CW_TMR2_EXT1PS_RISE				(0x0001 << 11)
.DEFINE CW_TMR2_EXT1PS_4RISE			(0x0002 << 11)
.DEFINE CW_TMR2_EXT1PS_16RISE			(0x0003 << 11)

.DEFINE CW_TMR2_INT_EN					(0x0001 << 13)
.DEFINE CW_TMR2_INTF_CLEAR				(0x0001 << 14)
.DEFINE CW_TMR2_EN						(0x0001 << 15)	


//=================================//
// I. SPI register				   //
//=================================//
// P_SPI_Ctrl register //
// word set //
.DEFINE CW_SPIFS_CPUCLKdiv4				0x0000
.DEFINE CW_SPIFS_CPUCLKdiv8				0x0001
.DEFINE CW_SPIFS_CPUCLKdiv16			0x0002
.DEFINE CW_SPIFS_CPUCLKdiv32			0x0003
.DEFINE CW_SPIFS_CPUCLKdiv64			0x0004
.DEFINE CW_SPIFS_CPUCLKdiv128			0x0005
.DEFINE CW_SPI_SLAVE_MODE				(0x0001 << 6)
.DEFINE CW_SPI_INT_EN					(0x0001 << 7)
.DEFINE CW_SPI_EN						(0x0001 << 8)
.DEFINE CW_SPI_CS_EN					(0x0001 << 9)

.DEFINE CW_SPI_SMPS 					(0x0001 << 5)
.DEFINE CW_SPI_PHA						(0x0001 << 4)
.DEFINE CW_SPI_POL						(0x0001 << 3)


// P_SPI_Status register //
// word set //
.DEFINE CW_SPIIF						0x0001
.DEFINE CW_SPITBF						(0x0001 << 1)	
.DEFINE CW_SPIROR						(0x0001 << 2)	


//=================================//
// J. SIO register				   //
//=================================//
// P_SIO_Ctrl register //
// word set //
.DEFINE CW_SIO_SLAVE_MODE				0x0001
.DEFINE CW_SIO_MASTER_MODE				(0x0001 << 1)	
.DEFINE CW_SIO_10BIT_ADDRMODE			(0x0001 << 2)	
.DEFINE CW_SIO_INT_EN					(0x0001 << 4)
.DEFINE CW_SIO_RELEASE_SDA				(0x0001 << 5)
.DEFINE CW_SIO_RELEASE_SCL				(0x0001 << 6)
.DEFINE CW_SIO_EN						(0x0001 << 7)


// P_SIO_Status register //
// word set //
.DEFINE CW_SIO_BUF_FULL					0x0001
.DEFINE CW_SIO_ADDR_UPDATE				(0x0001 << 1)	
.DEFINE CW_SIO_DIR_READ					(0x0001 << 2)	
.DEFINE CW_SIO_START_DETECTED			(0x0001 << 3)	
.DEFINE CW_SIO_STOP_DETECTED			(0x0001 << 4)	
.DEFINE CW_SIO_IS_DATA					(0x0001 << 5)	
.DEFINE CW_SIO_RCV_OVR					(0x0001 << 6)	
.DEFINE CW_SIO_CLEAR_INTF				(0x0001 << 7)	
.DEFINE CW_SIO_NON_ACK					(0x0001 << 8)	


//=================================//
// K. UART register 			   //
//=================================//
// P_UART_Ctrl register //
// word set //
.DEFINE CW_UART_RXD_INT_EN				0x0001
.DEFINE CW_UART_TXD_INT_EN				(0x0001 << 1)
.DEFINE CW_UART_EVEN_PARITY				(0x0001 << 2)
.DEFINE CW_UART_PARITY_EN				(0x0001 << 3)
.DEFINE CW_UART_MP_MODE					(0x0001 << 4)
.DEFINE CW_UART_11BIT_MODE				(0x0001 << 5)
.DEFINE CW_UART_RXD_EN					(0x0001 << 6)
.DEFINE CW_UART_TXD_EN					(0x0001 << 7)

// P_UART_Status register //
// word set //
.DEFINE CW_UART_RXD_INTF				0x0001
.DEFINE CW_UART_TXD_INTF				(0x0001 << 1)
.DEFINE CW_UART_PARITY_ERR				(0x0001 << 2)
.DEFINE CW_UART_FRAME_ERR				(0x0001 << 3)
.DEFINE CW_UART_ROR_ERR					(0x0001 << 4)
.DEFINE CW_UART_9BIT_1					(0x0001 << 5)
.DEFINE CW_UART_TXD_BUSY				(0x0001 << 6)
.DEFINE CW_UART_RXD_FULL				(0x0001 << 7)


// P_UART_BaudRate register //
// word set //
.DEFINE CW_UARTBR_1200					0xFB1E			//1200 bps Set
.DEFINE CW_UARTBR_2400					0xFD8F			//2400 bps Set
.DEFINE CW_UARTBR_4800					0xFEC8			//4800 bps Set
.DEFINE CW_UARTBR_9600					0xFF64			//9600 bps Set	
.DEFINE CW_UARTBR_19200					0xFFB2			//19200 bps Set
.DEFINE CW_UARTBR_57600					0xFFE6			//57600 bps Set
.DEFINE CW_UARTBR_115200				0xFFF3			//115200 bps Set

// P_UART_BaudRateL register //
// word set //
.DEFINE CW_UARTBRL_1200					0x001E			//1200 bps Set
.DEFINE CW_UARTBRL_2400					0x008F			//2400 bps Set
.DEFINE CW_UARTBRL_4800					0x00C8			//4800 bps Set
.DEFINE CW_UARTBRL_9600					0x0064			//9600 bps Set	
.DEFINE CW_UARTBRL_19200				0x00B2			//19200 bps Set
.DEFINE CW_UARTBRL_57600				0x00E6			//57600 bps Set
.DEFINE CW_UARTBRL_115200				0x00F3			//115200 bps Set

// P_UART_BaudRateH register //
// word set //
.DEFINE CW_UARTBRH_1200					0x00FB			//1200 bps Set
.DEFINE CW_UARTBRH_2400					0x00FD			//2400 bps Set
.DEFINE CW_UARTBRH_4800					0x00FE			//4800 bps Set
.DEFINE CW_UARTBRH_9600					0x00FF			//9600 bps Set	
.DEFINE CW_UARTBRH_19200				0x00FF			//19200 bps Set
.DEFINE CW_UARTBRH_57600				0x00FF			//57600 bps Set
.DEFINE CW_UARTBRH_115200				0x00FF			//115200 bps Set



//=================================//
// L. ADC register				   //
//=================================//
// P_ADC_Ctrl register //
// word set //
.DEFINE CW_ADC_EN						0x0001
.DEFINE CW_ADC_UNCS						(0x0001 << 1)
.DEFINE CW_ADC_CLK_CPUCLKdiv16			0x0000
.DEFINE CW_ADC_CLK_CPUCLKdiv32			(0x0001 << 2)
.DEFINE CW_ADC_CLK_CPUCLKdiv64			(0x0002 << 2)
.DEFINE CW_ADC_CLK_CPUCLKdiv128			(0x0003 << 2)
.DEFINE CW_ADC_SEL_ADC0					0x0000
.DEFINE CW_ADC_SEL_ADC1					(0x0001 << 4)
.DEFINE CW_ADC_SEL_ADC2					(0x0002 << 4)
.DEFINE CW_ADC_SEL_ADC3					(0x0003 << 4)
.DEFINE CW_ADC_SEL_ADC4					(0x0004 << 4)
.DEFINE CW_ADC_SEL_ADC5					(0x0005 << 4)
.DEFINE CW_ADC_SEL_ADC6					(0x0006 << 4)
.DEFINE CW_ADC_SEL_ADC7					(0x0007 << 4)
.DEFINE CW_ADC_REFVOL_VRT				(0x0001 << 8)
.DEFINE CW_ADC_INT_EN					(0x0001 << 9)
.DEFINE CW_ADC_SAMPLE_AT_8K				(0x0001 << 10)
.DEFINE CW_ADC_SAMPLE_AT_EXT			(0x0001 << 11)
.DEFINE CW_ADC_SAMPLE_AT_SOFT			(0x0001 << 12)
.DEFINE CW_ADC_IS_CONV_READY			(0x0001 << 13)


// P_ADC_Data register //
// word set //
.DEFINE CW_ADCRDY						(0x0001 << 15)	//ADC conversion ready
.DEFINE	CW_ADCDATA						0x03FF			//ADC conversion data